Rev |
Log message |
Author |
Age |
Path |
81 |
Installation script complete, nice text feedback, output logs and better execution order. |
rfajardo |
4853d 09h |
/minsoc/branches/rc-1.0/utils/ |
79 |
minsoc-install.sh: rpath corrected.
required-cygwin-tools: updated |
rfajardo |
4856d 14h |
/minsoc/branches/rc-1.0/utils/ |
78 |
minsoc-install.sh: Advanced JTAG bridge compilation needs to know where the dynamic libraries are on runtime. Patching (sed) the Makefile to compile it with the rpath to the libraries (libusb/libftdi). |
rfajardo |
4856d 14h |
/minsoc/branches/rc-1.0/utils/ |
77 |
New tool requirements for installing Icarus Verilog. |
rfajardo |
4856d 14h |
/minsoc/branches/rc-1.0/utils/ |
76 |
Including a script allowing the installation of MinSoC and all its required tools.
It should be working for all Linuxes and Cygwin. |
rfajardo |
4856d 14h |
/minsoc/branches/rc-1.0/utils/ |
64 |
firmware makefiles:
-every firmware makefile has now complete dependency. This also includes dependency on files under minsoc/backend (target specific files). That means, that if some target specific header changes, the support library dependent on it will be compiled. That will always happen, even if you compile the uart firmware. In other words, if you want to use uart firmware, you can always simply compile uart by issuing make all. If anything has changed, backend files, support library, drivers, it will update everything for you.
-TODO: dependency can be automatic created by using make together with gcc. Use it instead of declaring all dependencies manually.
Makefile system for synthesis:
-the dependency for every implementation step has been checked and is working fine.
-Makefile plus support files have been moved to minsoc/syn/src
-make usage is still under syn through files generated by backend bashscripts
Backend:
-files under backend are target specific files used for the system to work
-firmware compilation
-system simulation
-system implementation
-This directory is populated by visiting one of its subdirectories and typing ./configure
backend/spartan3a_dsp_kit:
-working on FPGA
backend/spartan3e_starter_kit:
-has to be tested
backend/ml509:
-missing files have to be copied and adapted, configure script has to be copied and adapted
backend/std:
-include files necessary for firmware compilation and system configuration
-it does not include files for synthesis and is not synthesizable |
rfajardo |
4963d 21h |
/minsoc/branches/rc-1.0/utils/ |
47 |
Firmware updated to work with gcc-4.5. It is actually working just fine and gcc-4.5 assembly code seems a lot cleaner.
I noticed that by increasing the free stack space for the interrupt handler by 130 made the resulting firmware not work. I assume it is because 130 is not aligned 130%4 = 2 and the stack simply does not work then. Instead I'm freeing the previous 116 plus 128 (for 32 registers as mentioned by Jeremy) and it works. |
rfajardo |
5006d 17h |
/minsoc/branches/rc-1.0/utils/ |
46 |
Including an explanation of what has to be updated on gpio to port it smoothly to minsoc. |
rfajardo |
5006d 22h |
/minsoc/branches/rc-1.0/utils/ |
45 |
A more stable version |
ConX. |
5007d 13h |
/minsoc/branches/rc-1.0/utils/ |
44 |
Fixing some bugs. But it still works only in Debian/Ubuntu |
ConX. |
5007d 14h |
/minsoc/branches/rc-1.0/utils/ |
43 |
Making some changes to MinSOC install script |
ConX. |
5008d 11h |
/minsoc/branches/rc-1.0/utils/ |
41 |
Including setup scripts to install all required tools to work with minsoc and to download all required sources. Thanks for the contribution of Xanthopoulos Constantinos. |
rfajardo |
5012d 18h |
/minsoc/branches/rc-1.0/utils/ |
40 |
Commiting a contributions directory, which has raw contributions of users. These contributions still have to be adapted to the system in order to work well. However, some users are certainly able to work with these versions.
FAQ: -added new idea to circumvent onboard DLC9 cable problem for adv_jtag_bridge
INSTALL: -gives a hint on how to install the system for Windows
HOWTO: -explains what a ucf file is and how to create it
backend: now we have the first contribution of a ucf file for the ML509 board (thanks to Matthew Hick)
Documentation: THESIS.txt explains to users, willing to tweak/understand the inner behavior of the OR1200 implementation of OpenRISC, what to read in order to get this information. |
rfajardo |
5018d 16h |
/minsoc/branches/rc-1.0/utils/ |
36 |
utils: -adding a 32 to 8 bit Wishbone bridge to connect 8 bit modules to the MinSoC interconnect.
-adding a Linux driver for parallel cables for the adv_jtag_bridge. It circumvents the necessity of privilege to run adv_jtag_bridge with cables xpc3 and xess.
sw/support: support library has been made completely standalone. That means, it is now independent from uClib and/or newlib. Thanks to Wojciech A. Koszek for his contribution on this.
sw/drivers: a driver library has been included, which supply drivers for the OpenRISC timer; and for UART, Ethernet, I2C, and CAN modules from OpenCores.
sw/uart and sw/eth: they don't provide code to control the UART and Ethernet controllers anymore. They use the drivers library instead.
Documentation:
-FAQ extended:
-table of contents
-explanation of how to use the 32 to 8 bit Wishbone bridge
-how to make adv_jtag_bridge work without privilege requirement for xess or xpc3
-explanation of locking problem of xpc_usb cable
-explanation of what to do if the cable is built on-board
-INSTALL:
-patching of gdb only required if version is 6.8, explanation on FAQ now.
-HOWTO:
-instruct to compile drivers library
-remove line numbers information on what to edit, better leave it to be found only by the informed context.
-adv_jtag_bridge execution now without 'sudo'. Note included that 'sudo' is required for Linux and xess or xpc3. Reference to FAQ to avoid this requirement. |
rfajardo |
5149d 15h |
/minsoc/branches/rc-1.0/utils/ |