Rev |
Log message |
Author |
Age |
Path |
174 |
Rok Krajnc port of the Altera DE1 board with a Cyclone II. Thanks a lot! |
rfajardo |
4060d 04h |
/minsoc/trunk/backend/ |
173 |
Jay Aurabind's contribution of a port to the Nexys 3 board from Digilent. Thanks!! |
rfajardo |
4060d 05h |
/minsoc/trunk/backend/ |
168 |
Installation script has an option for advanced or resumed installation.
Advanced mode:
the script only downloads and installs the required tools. Dependency libraries and tools are checked during individual tool compilation. Furthermore, the install directory is not added to the system PATH. You have to do it yourself. Libusb, libftdi and Icarus Verilog are supposed to be installed by the user.
Resumed mode:
the script checks if the dependency libraries and tools are installed before doing anything. It also adds the installation directory to the system PATH variable for bash shells on HOME/.bashrc. Libusb, libftdi and Icarus Verilog are automatically installed for you.
Non standard configuration scripts that require or1200_defines.v to be tweaked will ask before doing so and backup the correspondent files. |
rfajardo |
4361d 07h |
/minsoc/trunk/backend/ |
165 |
Board contribution: nexys2_1200 (Thanks to Johan Granath)
spartan3e_starter_kit_eth/minsoc_bench_defines.v: deprecated definition updated |
rfajardo |
4426d 10h |
/minsoc/trunk/backend/ |
159 |
Updated constraint file for de2_115 board. (Richard Hasha) |
rfajardo |
4516d 08h |
/minsoc/trunk/backend/ |
158 |
Adding de2_115_board port, thanks to Richard Hasha.
Support to JSP (JTAG Serial Port) working well. Also provided by Richard Hasha.
Different interconnect configurations per board are not straightforward on MinSoC. New added modules or definitions for addresses have to be carried over to other boards. Furthermore, extra modules can be shared among all projects. Thus, it is better to have this centralized:
-Removing interconnect configuration from minsoc_defines.v. There is an interconnect_defines.v file on rtl/verilog. The software counterpart is interconnect.h on sw/drivers.
Including a jsp firmware. It is basically the uart firmware but using JSP instead. Added to all board configure scripts to be compiled on configuration.
prj/srcs extended to include jsp and interconnec_defines.v.
spartan3e_starter_kit_eth lost UART (does not fit) and uses JSP instead now. |
rfajardo |
4518d 00h |
/minsoc/trunk/backend/ |
149 |
Merging differences of release candidate 1.0 revision 140:148 with trunk. |
rfajardo |
4556d 09h |
/minsoc/trunk/backend/ |
144 |
Updating configure scripts. Calling make into the right directories now. |
rfajardo |
4562d 08h |
/minsoc/trunk/backend/ |
142 |
Updating configure.sh:
1) we don't patch the trunk version.
2) it is better to re-compile the firmwares on reconfiguration. So compiling firmwares went to configure scripts instead.
backend/xxx/configure: compiling firmwares here now. |
rfajardo |
4562d 08h |
/minsoc/trunk/backend/ |
141 |
Merging with rc-1.0 revision 140. I doubt rc-1.0 will still change much in the last days. |
rfajardo |
4562d 09h |
/minsoc/trunk/backend/ |
105 |
Updating configure scripts to copy Windows synthesis launch script setup.bat from either minsoc/syn/altera or minsoc/syn/xilinx to minsoc/syn. |
rfajardo |
4589d 10h |
/minsoc/trunk/backend/ |
99 |
backend/altera_3c25_board/minsoc_defines.v: if GENERIC_FPGA selected, undefine ALTERA_FPGA and FPGA_FAMILY to avoid vendor specific code to flow into the simulation. If you don't do it, generate_bench fails. |
rfajardo |
4633d 10h |
/minsoc/trunk/backend/ |
97 |
As proposed by Javier Almansa automatically generated project files for simulation and synthesis are out of revision control. Instead, the backend configure scripts run the prj/Makefile now to generate the project files prior to configuration of SoC for a specific board. |
rfajardo |
4633d 10h |
/minsoc/trunk/backend/ |
96 |
Some files needed for Altera synthesis |
javieralso |
4633d 21h |
/minsoc/trunk/backend/ |
95 |
Makefile for Altera FPGAs fixed |
javieralso |
4635d 00h |
/minsoc/trunk/backend/ |
93 |
Support for Altera synthesis. It needs some tune, but it works fine |
javieralso |
4637d 12h |
/minsoc/trunk/backend/ |
92 |
backend/spartan3e_starter_kit*: or1200_defines.v file was outdated and hindering synthesis. Probably it would be best if we used a patching system here. But for now, I copied the new files and made the necessary changes to fit the system into the target boards. |
rfajardo |
4638d 10h |
/minsoc/trunk/backend/ |
88 |
Project structure, Xilinx Makefiles and simulation working. |
rfajardo |
4639d 02h |
/minsoc/trunk/backend/ |
87 |
Synchronizing scripts to behave exactly the same. |
rfajardo |
4639d 04h |
/minsoc/trunk/backend/ |
86 |
Updating configure script messages. |
rfajardo |
4639d 04h |
/minsoc/trunk/backend/ |
85 |
Central project definition under prj. Synthesis and simulation take their project files from here. |
rfajardo |
4639d 04h |
/minsoc/trunk/backend/ |
80 |
Establishing a better Makefile system for firmwares. |
rfajardo |
4657d 08h |
/minsoc/trunk/backend/ |
70 |
Including a global timescale under minsoc/rtl/verilog to control simulation. It is under the implementation because the implementation files include it.
Removing timescale definition of minsoc_bench_defines.v files.
Creating a modelsim simulation directory. Everything is working under Linux. For Windows, run_sim.sh has to be changed:
-pli ../../bench/verilog/vpi/jp-io-vpi.so
to:
-pli ../../bench/verilog/vpi/jp-io-vpi.dll
These files have to be compiled/copied from minsoc/rtl/verilog/adv_debug_sys/Software/adv_jtag_bridge/sim_lib/modelsim_platform to minsoc/bench/verilog/vpi. |
rfajardo |
4758d 09h |
/minsoc/trunk/backend/ |
69 |
backend update:
-minsoc_bench_defines.v
-gcc-opt.mk
Both files should now be under minsoc/backend to proper system functionality.
backend subdirectories have been given those files. Configure script updated accordingly.
They are searched there from system scripts and Makefiles.
-sim/bin/minsoc_verilog_files.txt has the files for Icarus Verilog, minsoc_bench_defines.v is now referenced from backend directory.
-sw/support/Makefile.inc now references to gcc-opt.mk inside backend.
backend/spartan3e_starter_kit_eth:
-It is the system configuration for Spartan 3E Starter Kit with Ethernet. |
rfajardo |
4763d 01h |
/minsoc/trunk/backend/ |
68 |
Still one configuration mismatch on minsoc_defines.v:
-MEMORY_ADR_WIDTH now 15
-orp.ld is defined accordingly |
rfajardo |
4765d 05h |
/minsoc/trunk/backend/ |
67 |
Constraint file for backend spartan3a_dsp_kit.ucf was configured to include the STARTUP module.
This module is not enabled under the respective minsoc_defines.v. Thus, its pins had to be commented out. |
rfajardo |
4765d 05h |
/minsoc/trunk/backend/ |
66 |
spartan3e_starter_kit requires special configuration of or1200_r3.
For that, configure script was specially adapted and that is reported on script execution.
For release-1.0 of MinSoC this should not be required, because or1200_r1 already has the
required configuration. |
rfajardo |
4765d 06h |
/minsoc/trunk/backend/ |
65 |
Files missing in the last commit.
backend/std/configure
sw: eth, uart and driver Makefiles |
rfajardo |
4765d 07h |
/minsoc/trunk/backend/ |
64 |
firmware makefiles:
-every firmware makefile has now complete dependency. This also includes dependency on files under minsoc/backend (target specific files). That means, that if some target specific header changes, the support library dependent on it will be compiled. That will always happen, even if you compile the uart firmware. In other words, if you want to use uart firmware, you can always simply compile uart by issuing make all. If anything has changed, backend files, support library, drivers, it will update everything for you.
-TODO: dependency can be automatic created by using make together with gcc. Use it instead of declaring all dependencies manually.
Makefile system for synthesis:
-the dependency for every implementation step has been checked and is working fine.
-Makefile plus support files have been moved to minsoc/syn/src
-make usage is still under syn through files generated by backend bashscripts
Backend:
-files under backend are target specific files used for the system to work
-firmware compilation
-system simulation
-system implementation
-This directory is populated by visiting one of its subdirectories and typing ./configure
backend/spartan3a_dsp_kit:
-working on FPGA
backend/spartan3e_starter_kit:
-has to be tested
backend/ml509:
-missing files have to be copied and adapted, configure script has to be copied and adapted
backend/std:
-include files necessary for firmware compilation and system configuration
-it does not include files for synthesis and is not synthesizable |
rfajardo |
4765d 08h |
/minsoc/trunk/backend/ |
63 |
Adding a functional synthesis Makefile system. Still needs a reviews and enhancements, but at least it is something. |
rfajardo |
4769d 02h |
/minsoc/trunk/backend/ |