OpenCores
URL https://opencores.org/ocsvn/minsoc/minsoc/trunk

Subversion Repositories minsoc

[/] [minsoc/] [trunk/] [doc/] - Rev 62

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
49 Language correction for README.txt. rfajardo 5005d 21h /minsoc/trunk/doc/
48 Clear some old docs that are already ported to MinSOC's Wiki ConX. 5005d 22h /minsoc/trunk/doc/
40 Commiting a contributions directory, which has raw contributions of users. These contributions still have to be adapted to the system in order to work well. However, some users are certainly able to work with these versions.

FAQ: -added new idea to circumvent onboard DLC9 cable problem for adv_jtag_bridge
INSTALL: -gives a hint on how to install the system for Windows
HOWTO: -explains what a ucf file is and how to create it

backend: now we have the first contribution of a ucf file for the ML509 board (thanks to Matthew Hick)

Documentation: THESIS.txt explains to users, willing to tweak/understand the inner behavior of the OR1200 implementation of OpenRISC, what to read in order to get this information.
rfajardo 5018d 20h /minsoc/trunk/doc/
39 FAQ:
-Adv_jtag_bridge self test fails?
-included now SoC flow mistakes
-forgetting to upload the bitfile
-leaving clock unconnected
-older information is now under "Known Issues" right below of SoC flow mistakes

Software:
-eth: included eth.h is from drivers and not from this directory. eth.h from this directory is old and has been removed.
-uart: included uart.h is from drivers and not from this directory. uart.h from this directory is old and has been removed.
rfajardo 5083d 12h /minsoc/trunk/doc/
38 Small update to HOWTO: advices now to also include the ucf (pinout) file, for forgetful people :-).

FAQ: Added another option (hint) as a solution for people with on-board Xilinx USB cables, which do not reset.

uart.c: now uses the IRQ line definition instead of the line number directly.
rfajardo 5118d 12h /minsoc/trunk/doc/
37 README.txt added, describing the installation and set-up processes. Also describing to use the FAQ or forum when you have problems and finally to read minsoc.pdf (the documentation) to understand the system after everything works, to know what to do next.

Clean-up of sw/utils, removing unused sources and files.

Update of sw/drivers/eth.c, direct casting to avoid compile warnings.

FAQ extended and with more links to the threads giving the solutions.

Synthesis examples inform that the firmware tweak for Spartan3E Starter Kit using Ethernet only works for system version up to 35.

minsoc.pdf and webpage now uses FPGA generic and specific codes instead of FPGA independent and dependent codes, because it suits it better.
rfajardo 5148d 23h /minsoc/trunk/doc/
36 utils: -adding a 32 to 8 bit Wishbone bridge to connect 8 bit modules to the MinSoC interconnect.
-adding a Linux driver for parallel cables for the adv_jtag_bridge. It circumvents the necessity of privilege to run adv_jtag_bridge with cables xpc3 and xess.

sw/support: support library has been made completely standalone. That means, it is now independent from uClib and/or newlib. Thanks to Wojciech A. Koszek for his contribution on this.

sw/drivers: a driver library has been included, which supply drivers for the OpenRISC timer; and for UART, Ethernet, I2C, and CAN modules from OpenCores.

sw/uart and sw/eth: they don't provide code to control the UART and Ethernet controllers anymore. They use the drivers library instead.

Documentation:
-FAQ extended:
-table of contents
-explanation of how to use the 32 to 8 bit Wishbone bridge
-how to make adv_jtag_bridge work without privilege requirement for xess or xpc3
-explanation of locking problem of xpc_usb cable
-explanation of what to do if the cable is built on-board
-INSTALL:
-patching of gdb only required if version is 6.8, explanation on FAQ now.
-HOWTO:
-instruct to compile drivers library
-remove line numbers information on what to edit, better leave it to be found only by the informed context.
-adv_jtag_bridge execution now without 'sudo'. Note included that 'sudo' is required for Linux and xess or xpc3. Reference to FAQ to avoid this requirement.
rfajardo 5149d 18h /minsoc/trunk/doc/
35 minsoc.pdf: -adjusting the date on the page header of MinSoC documentation. It was correct on the front and revision pages, now header adjusted accordingly. rfajardo 5154d 12h /minsoc/trunk/doc/
34 start_server changed: '-t' option of adv_jtag_bridge for vpi connection on simulation removed. or1200_v3 will not pass on CPU self test.

FAQ completed with asked questions since Februrary 2010.

INSTALL informs bsdl files only have to be copied to home directory for Xilinx devices.

synthesis_examples title includes Minimal OpenRISC System on Chip.
rfajardo 5163d 21h /minsoc/trunk/doc/
32 Documentation revision 1.1, thanks to Wojciech A. Koszek for many comments on it.

Also updating howto, splitint it in INSTALL, HOWTO, FAQ and synthesis_examples, so it should be more clear now what to do when and not to try too much when you don't need. Like everyone was trying to debug the simulation but didn't even test the regular simulation before. Again thanks to Wojciech A. Koszek for his view on this matter.
rfajardo 5185d 20h /minsoc/trunk/doc/
31 Adaption to or1200_r3. It is still important to change or1200_defines.v:
-`define OR1200_BOOT_ADR 32'hf0000100 to `define OR1200_BOOT_ADR 32'h00000100
rfajardo 5241d 03h /minsoc/trunk/doc/
30 minsoc SoC documentation had 2 small typo corrections. Performance penalty due to addition of register addresses was a wrong assumption. On project description "is composed by" -> "consists of". Thanks to Wojciech A. Koszek.

howto, at some places the howto did not tell the path from the files being talked about. I tried to always specify the path for every commented file.

Scripts for running the simulation called bash instead of sh. For compatibility reasons sh is now used, this should affect noone. Scripts do not use bash specific commands and generally every UNIX like computer has sh. Thanks again to Wojciech A. Koszek, who adapted that to port it to FreeBSD.
rfajardo 5284d 01h /minsoc/trunk/doc/
29 Finishing the howto for Spartan3E Starter Kit with Ethernet. Last hint, change uart baudrate to 9600 to avoid the baudrate skew problem due to truncation.

Following the howto to implement Ethernet on Spartan3E Starter Kit will work flawlessly now.
rfajardo 5326d 01h /minsoc/trunk/doc/
28 1) Period calculations through 1/freq on testbench use now a numerator definition in order to extract nano seconds of the divisions. Previously the number 1e9 was being repeatedly typed as numerator, now FREQ_NUM_FOR_NS is used.

2) There is a possibility of enabling the GENERIC_CLOCK_DIVISION for the testbench, so that you can test the outcome of different system clock inputs and internal clock adjustments. To do so, NO_CLOCK_DIVISION definition of minsoc_bench_defines.v has to be commented out.
-This also requested the initialization of the internal registers clk_int and clock_divisor of the minsoc_clock_manager.v, this is made by the testbench in case the NO_CLOCK_DIVISION definition is NOT defined.

3) Howto part of implementing Ethernet for the Spartan3E Starter Kit has been completely described. (Chapter 7, subitem 3)
rfajardo 5326d 20h /minsoc/trunk/doc/
25 Updated the howto document to adapt minsoc to a new update of the Advanced Debug System.
-Compilation of adv_jtag_bridge needs a Makefile adjustment.
-Simulation and Implementation have to remove a definition on the adbg_defines.v file.

Both adjustments simply removes the new JSP (JTAG Serial Port), which has been included in the new release of the Advanced Debug System.
rfajardo 5356d 02h /minsoc/trunk/doc/
24 E-mail in the documentation has been corrected. rfajardo 5419d 14h /minsoc/trunk/doc/
23 Paragraph minor changes, used in announcement and double checked. rfajardo 5423d 19h /minsoc/trunk/doc/
22 Status progress and howto pdf documents were not commited, there now. rfajardo 5423d 19h /minsoc/trunk/doc/
21 Including the first draft project documentation. How to and status progress docs are now separate from documentation. rfajardo 5423d 21h /minsoc/trunk/doc/
20 minsoc_defines.v had a semicolon at the end of the two reset polarity definitions.

minsoc_top had a signal array for two different signals which was for backward compatibility. The compatible debugging module is so old that there is no reason for keeping it.

Documentation has been updated to better explain how to use the definitions files, minsoc_defines.v and or1200_defines.v. An example for Altera devices has been added too.
rfajardo 5430d 21h /minsoc/trunk/doc/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.