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[/] [minsoc/] [trunk/] [prj/] [altera] - Rev 97


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Rev Log message Author Age Path
97 As proposed by Javier Almansa automatically generated project files for simulation and synthesis are out of revision control. Instead, the backend configure scripts run the prj/Makefile now to generate the project files prior to configuration of SoC for a specific board. rfajardo 3565d 17h /minsoc/trunk/prj/altera
96 Some files needed for Altera synthesis javieralso 3566d 03h /minsoc/trunk/prj/altera
95 Makefile for Altera FPGAs fixed javieralso 3567d 06h /minsoc/trunk/prj/altera
94 Fix bug in minsoc_top.prj for Altera synthesis javieralso 3569d 15h /minsoc/trunk/prj/altera
93 Support for Altera synthesis. It needs some tune, but it works fine javieralso 3569d 18h /minsoc/trunk/prj/altera
85 Central project definition under prj. Synthesis and simulation take their project files from here. rfajardo 3571d 10h /minsoc/trunk/prj/altera

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