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[/] [minsoc/] [trunk/] [sim/] [modelsim/] [run_sim.sh] - Rev 141

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141 Merging with rc-1.0 revision 140. I doubt rc-1.0 will still change much in the last days. rfajardo 2913d 19h /minsoc/trunk/sim/modelsim/run_sim.sh
70 Including a global timescale under minsoc/rtl/verilog to control simulation. It is under the implementation because the implementation files include it.

Removing timescale definition of minsoc_bench_defines.v files.

Creating a modelsim simulation directory. Everything is working under Linux. For Windows, run_sim.sh has to be changed:
-pli ../../bench/verilog/vpi/jp-io-vpi.so
to:
-pli ../../bench/verilog/vpi/jp-io-vpi.dll

These files have to be compiled/copied from minsoc/rtl/verilog/adv_debug_sys/Software/adv_jtag_bridge/sim_lib/modelsim_platform to minsoc/bench/verilog/vpi.
rfajardo 3109d 20h /minsoc/trunk/sim/modelsim/run_sim.sh

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