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Rev Log message Author Age Path
140 Including required modules for verilator simulation. rfajardo 4629d 00h /
139 Creating a verilator branche. rfajardo 4629d 00h /
138 DIR_TO_INSTALL creation using wizard ConX. 4629d 13h /
137 Removing uncomplete support for ml509 and not working support for spartan3e_starter_kit_eth (area constraint cannot be reached). rfajardo 4630d 00h /
136 Installation on Ubuntu-11.10 has shown that a binary called makeinfo is required to install GDB. This binary can be installed on Ubuntu by installing the package texinfo. rfajardo 4636d 19h /
135 Installation on Ubuntu-11.10 has shown that package texinfo is required to compiled GDB. This package installs the binary makeinfo. rfajardo 4636d 19h /
134 run_sim.bat for ModelSim updated to acquire the firmware_size for command line input when running the testbench. rfajardo 4643d 23h /
133 Roll back minsoc_bench.v to timed simulation. Merge minsoc_bench_core and minsoc_bench_clock again.

Applying Rubén Diez patch to avoid warnings on firmware load for simulation.
rfajardo 4644d 01h /
132 ModelSim simulation, running top_module minsoc_bench_clock now, instead of minsoc_bench. rfajardo 4647d 20h /
131 Renaming testbench modules. Adding to ifdefs without which the testbench generation can fail. rfajardo 4647d 20h /

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