URL https://opencores.org/ocsvn/mod_sim_exp/mod_sim_exp/trunk

Subversion Repositories mod_sim_exp

[/] [mod_sim_exp/] - Rev 66

Rev	Log message	Author	Age	Path
46	chance run_auto port or mod_sim_exp_core to exp_m	JonasDC	4178d 02h	/mod_sim_exp/
45	chance run_auto port or mod_sim_exp_core to exp_m	JonasDC	4178d 02h	/mod_sim_exp/
44	toplevel of the Modular Simultaneous Exponentiation IP core for the PLB interface	JonasDC	4181d 20h	/mod_sim_exp/
43	made the core parameters generics	JonasDC	4181d 20h	/mod_sim_exp/
42	corrected wrong library name for mod_sim_exp_pkg	JonasDC	4188d 03h	/mod_sim_exp/
41	removed deprecated files from version control	JonasDC	4188d 04h	/mod_sim_exp/
40	adjusted core instantiation to new core module name	JonasDC	4196d 08h	/mod_sim_exp/
39	changed files to remove warnings from synthesis last cell logic is simplified because of redundant logic	JonasDC	4196d 19h	/mod_sim_exp/
38	deprecated design files because of new pipeline structure, will be removed shortly	JonasDC	4197d 00h	/mod_sim_exp/
37	changed names of some generics of the multiplier. moved the parameters for the core to the package of the core testbench now uses this parameters to adapt to different bit widths and new systolic pipeline now supports split or single pipeline	JonasDC	4200d 21h	/mod_sim_exp/