URL https://opencores.org/ocsvn/mod_sim_exp/mod_sim_exp/trunk

Subversion Repositories mod_sim_exp

[/] [mod_sim_exp/] - Rev 69

Rev	Log message	Author	Age	Path
49	First full stable version with documentation. Includes flexible pipeline design, PLB interface and the RAM and FIFO is still using xilinx primitives.	JonasDC	4101d 12h	/mod_sim_exp/
48	Tag of the starting version of the project	JonasDC	4101d 12h	/mod_sim_exp/
47	added documentation for the IP core.	JonasDC	4169d 17h	/mod_sim_exp/
46	chance run_auto port or mod_sim_exp_core to exp_m	JonasDC	4169d 17h	/mod_sim_exp/
45	chance run_auto port or mod_sim_exp_core to exp_m	JonasDC	4169d 17h	/mod_sim_exp/
44	toplevel of the Modular Simultaneous Exponentiation IP core for the PLB interface	JonasDC	4173d 10h	/mod_sim_exp/
43	made the core parameters generics	JonasDC	4173d 10h	/mod_sim_exp/
42	corrected wrong library name for mod_sim_exp_pkg	JonasDC	4179d 18h	/mod_sim_exp/
41	removed deprecated files from version control	JonasDC	4179d 18h	/mod_sim_exp/
40	adjusted core instantiation to new core module name	JonasDC	4187d 22h	/mod_sim_exp/