URL https://opencores.org/ocsvn/mod_sim_exp/mod_sim_exp/trunk

Subversion Repositories mod_sim_exp

[/] [mod_sim_exp/] [tags/] [Release_1.0/] [sim/] [Makefile] - Rev 100

Rev	Log message	Author	Age	Path
100	added version 1.0 tag for completeness. This version is the first version that is adapted to the opencores design rules. Also the code is cleaned up. previous tag was incorrect, now updated	JonasDC	3927d 02h	/mod_sim_exp/tags/Release_1.0/sim/Makefile
24	changed names of top-level module to mod_sim_exp_core	JonasDC	4199d 23h	/mod_sim_exp/tags/Release_1.0/sim/Makefile
3	updated vhdl sources with new header according to OC design rules and formated code added makefile and simulation input file for testbench simulation	JonasDC	4211d 14h	/mod_sim_exp/tags/Release_1.0/sim/Makefile