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[/] [mod_sim_exp/] [tags/] [start_version/] [rtl/] - Rev 63

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Rev Log message Author Age Path
48 Tag of the starting version of the project JonasDC 4181d 09h /mod_sim_exp/tags/start_version/rtl/
2 First version of VHDL source(working), still contains xilinx primitives and needs to be updated to the OpenCores design rules.. JonasDC 4293d 14h /mod_sim_exp/trunk/rtl/

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