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[/] [mod_sim_exp/] [trunk/] - Rev 2

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2 First version of VHDL source(working), still contains xilinx primitives and needs to be updated to the OpenCores design rules.. JonasDC 3756d 04h /mod_sim_exp/trunk/
1 The project and the structure was created root 3758d 04h /mod_sim_exp/trunk/

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