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Subversion Repositories mod_sim_exp

[/] [mod_sim_exp/] [trunk/] - Rev 24

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Rev Log message Author Age Path
24 changed names of top-level module to mod_sim_exp_core JonasDC 4226d 06h /mod_sim_exp/trunk/
23 added descriptive comments JonasDC 4226d 07h /mod_sim_exp/trunk/
22 updated the systolic pipeline with descriptive signal names and comments JonasDC 4229d 01h /mod_sim_exp/trunk/
21 changed x_i signal to xi JonasDC 4230d 08h /mod_sim_exp/trunk/
20 added comments, changed signal name of x_reg_i to x_reg.
File is now according to OC design rules
JonasDC 4230d 08h /mod_sim_exp/trunk/
19 updated files with descriptive comments
changed signal names and removed redundant signals in stepping_logic
JonasDC 4235d 03h /mod_sim_exp/trunk/
18 updated stages with comments and renamed some signals for consistency JonasDC 4236d 03h /mod_sim_exp/trunk/
17 updated files with descriptive comments and removed unnecessary signals in standard stage. Files are now according to OC design rules JonasDC 4236d 08h /mod_sim_exp/trunk/
16 package with modified generic parameter for register_n JonasDC 4236d 21h /mod_sim_exp/trunk/
15 changed generic for register width from n to width for consistency JonasDC 4236d 21h /mod_sim_exp/trunk/
14 changed comments, file is now according to OC design rules JonasDC 4236d 22h /mod_sim_exp/trunk/
13 added some descriptive comments and added check for incorrect value's of width and block_width.
File is now according to OC design rules
JonasDC 4236d 22h /mod_sim_exp/trunk/
12 updated comments, file is now completely according to design rules JonasDC 4236d 22h /mod_sim_exp/trunk/
11 simulation output folder JonasDC 4237d 00h /mod_sim_exp/trunk/
10 changed signal input port names to correct name JonasDC 4237d 03h /mod_sim_exp/trunk/
9 added descriptive comments, and renamed input mux_result from cell_1b_adder to b for a more generic multipurpose code
also renamed output s from n_adder to r, to keep same signal names
JonasDC 4237d 03h /mod_sim_exp/trunk/
8 added descriptive comments JonasDC 4237d 05h /mod_sim_exp/trunk/
7 Modified the architecture, no longer uses Xilinx primitive, instead generic instantiation
added descriptive comments
JonasDC 4237d 05h /mod_sim_exp/trunk/
6 Modified the architecture, no longer uses Xilinx primitive, instead generic instantiation
added descriptive comments
JonasDC 4237d 06h /mod_sim_exp/trunk/
5 not needed on svn, is generated by testbench JonasDC 4237d 06h /mod_sim_exp/trunk/

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