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[/] [mod_sim_exp/] [trunk/] - Rev 32

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32 new systolic pipeline structure now has split pipeline support, tested and verified in simulation. the core now uses this pipeline by default. JonasDC 4201d 07h /mod_sim_exp/trunk
31 put first cell logic of the pipeline in a separate design unit, tested and working JonasDC 4201d 12h /mod_sim_exp/trunk
30 put last cell logic of the pipeline in a separate design unit, tested and working JonasDC 4201d 12h /mod_sim_exp/trunk
29 added software for generation of test input for the tesbenches JonasDC 4202d 02h /mod_sim_exp/trunk
28 updated makefile for new pipeline sources JonasDC 4202d 02h /mod_sim_exp/trunk
27 test input values for multiplier_tb JonasDC 4202d 02h /mod_sim_exp/trunk
26 testbench for only the montgommery multiplier JonasDC 4202d 02h /mod_sim_exp/trunk
25 first version of new pipeline design. allows for more flexibility in nr of stages.
does not support split pipeline support yet. currently only works for single pipeline
JonasDC 4202d 02h /mod_sim_exp/trunk
24 changed names of top-level module to mod_sim_exp_core JonasDC 4205d 11h /mod_sim_exp/trunk
23 added descriptive comments JonasDC 4205d 13h /mod_sim_exp/trunk
22 updated the systolic pipeline with descriptive signal names and comments JonasDC 4208d 06h /mod_sim_exp/trunk
21 changed x_i signal to xi JonasDC 4209d 14h /mod_sim_exp/trunk
20 added comments, changed signal name of x_reg_i to x_reg.
File is now according to OC design rules
JonasDC 4209d 14h /mod_sim_exp/trunk
19 updated files with descriptive comments
changed signal names and removed redundant signals in stepping_logic
JonasDC 4214d 09h /mod_sim_exp/trunk
18 updated stages with comments and renamed some signals for consistency JonasDC 4215d 09h /mod_sim_exp/trunk
17 updated files with descriptive comments and removed unnecessary signals in standard stage. Files are now according to OC design rules JonasDC 4215d 14h /mod_sim_exp/trunk
16 package with modified generic parameter for register_n JonasDC 4216d 03h /mod_sim_exp/trunk
15 changed generic for register width from n to width for consistency JonasDC 4216d 03h /mod_sim_exp/trunk
14 changed comments, file is now according to OC design rules JonasDC 4216d 03h /mod_sim_exp/trunk
13 added some descriptive comments and added check for incorrect value's of width and block_width.
File is now according to OC design rules
JonasDC 4216d 03h /mod_sim_exp/trunk

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