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[/] [mod_sim_exp/] [trunk/] - Rev 42

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Rev Log message Author Age Path
42 corrected wrong library name for mod_sim_exp_pkg JonasDC 4597d 09h /mod_sim_exp/trunk/
41 removed deprecated files from version control JonasDC 4597d 09h /mod_sim_exp/trunk/
40 adjusted core instantiation to new core module name JonasDC 4605d 13h /mod_sim_exp/trunk/
39 changed files to remove warnings from synthesis
last cell logic is simplified because of redundant logic
JonasDC 4606d 00h /mod_sim_exp/trunk/
38 deprecated design files because of new pipeline structure, will be removed shortly JonasDC 4606d 06h /mod_sim_exp/trunk/
37 changed names of some generics of the multiplier.
moved the parameters for the core to the package of the core
testbench now uses this parameters to adapt to different bit widths

and new systolic pipeline now supports split or single pipeline
JonasDC 4610d 03h /mod_sim_exp/trunk/
36 found bug in new pipeline structure, now working properly. (tested in sim)
mod_sim_exp_core uses new flexible pipeline as default.
JonasDC 4610d 23h /mod_sim_exp/trunk/
35 new test values, 1st exponentiation gives error on result with new pipeline
commit for test purposes
JonasDC 4611d 01h /mod_sim_exp/trunk/
34 operand memory now supports custom operand widths, the internal memory stays the fixed 1536 bit, but the bus width is now adjustable to any size below. JonasDC 4611d 03h /mod_sim_exp/trunk/
33 default pipeline changed to old version, there seems to be an occasional error with new version. JonasDC 4611d 05h /mod_sim_exp/trunk/
32 new systolic pipeline structure now has split pipeline support, tested and verified in simulation. the core now uses this pipeline by default. JonasDC 4611d 06h /mod_sim_exp/trunk/
31 put first cell logic of the pipeline in a separate design unit, tested and working JonasDC 4611d 12h /mod_sim_exp/trunk/
30 put last cell logic of the pipeline in a separate design unit, tested and working JonasDC 4611d 12h /mod_sim_exp/trunk/
29 added software for generation of test input for the tesbenches JonasDC 4612d 01h /mod_sim_exp/trunk/
28 updated makefile for new pipeline sources JonasDC 4612d 02h /mod_sim_exp/trunk/
27 test input values for multiplier_tb JonasDC 4612d 02h /mod_sim_exp/trunk/
26 testbench for only the montgommery multiplier JonasDC 4612d 02h /mod_sim_exp/trunk/
25 first version of new pipeline design. allows for more flexibility in nr of stages.
does not support split pipeline support yet. currently only works for single pipeline
JonasDC 4612d 02h /mod_sim_exp/trunk/
24 changed names of top-level module to mod_sim_exp_core JonasDC 4615d 11h /mod_sim_exp/trunk/
23 added descriptive comments JonasDC 4615d 12h /mod_sim_exp/trunk/
22 updated the systolic pipeline with descriptive signal names and comments JonasDC 4618d 06h /mod_sim_exp/trunk/
21 changed x_i signal to xi JonasDC 4619d 13h /mod_sim_exp/trunk/
20 added comments, changed signal name of x_reg_i to x_reg.
File is now according to OC design rules
JonasDC 4619d 13h /mod_sim_exp/trunk/
19 updated files with descriptive comments
changed signal names and removed redundant signals in stepping_logic
JonasDC 4624d 09h /mod_sim_exp/trunk/
18 updated stages with comments and renamed some signals for consistency JonasDC 4625d 08h /mod_sim_exp/trunk/
17 updated files with descriptive comments and removed unnecessary signals in standard stage. Files are now according to OC design rules JonasDC 4625d 13h /mod_sim_exp/trunk/
16 package with modified generic parameter for register_n JonasDC 4626d 02h /mod_sim_exp/trunk/
15 changed generic for register width from n to width for consistency JonasDC 4626d 02h /mod_sim_exp/trunk/
14 changed comments, file is now according to OC design rules JonasDC 4626d 03h /mod_sim_exp/trunk/
13 added some descriptive comments and added check for incorrect value's of width and block_width.
File is now according to OC design rules
JonasDC 4626d 03h /mod_sim_exp/trunk/

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