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[/] [mod_sim_exp/] [trunk/] [bench/] - Rev 77

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Rev Log message Author Age Path
76 testbench update JonasDC 3610d 12h /mod_sim_exp/trunk/bench/
70 updated testbench for use with new core parameters
updated makefile, added new sources
JonasDC 3615d 07h /mod_sim_exp/trunk/bench/
46 chance run_auto port or mod_sim_exp_core to exp_m JonasDC 3710d 09h /mod_sim_exp/trunk/bench/
43 made the core parameters generics JonasDC 3714d 02h /mod_sim_exp/trunk/bench/
37 changed names of some generics of the multiplier.
moved the parameters for the core to the package of the core
testbench now uses this parameters to adapt to different bit widths

and new systolic pipeline now supports split or single pipeline
JonasDC 3733d 04h /mod_sim_exp/trunk/bench/
26 testbench for only the montgommery multiplier JonasDC 3735d 03h /mod_sim_exp/trunk/bench/
24 changed names of top-level module to mod_sim_exp_core JonasDC 3738d 12h /mod_sim_exp/trunk/bench/
3 updated vhdl sources with new header according to OC design rules and formated code
added makefile and simulation input file for testbench simulation
JonasDC 3750d 04h /mod_sim_exp/trunk/bench/
2 First version of VHDL source(working), still contains xilinx primitives and needs to be updated to the OpenCores design rules.. JonasDC 3754d 10h /mod_sim_exp/trunk/bench/

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