OpenCores
URL https://opencores.org/ocsvn/mod_sim_exp/mod_sim_exp/trunk

Subversion Repositories mod_sim_exp

[/] [mod_sim_exp/] [trunk/] [bench/] [vhdl/] - Rev 37

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
37 changed names of some generics of the multiplier.
moved the parameters for the core to the package of the core
testbench now uses this parameters to adapt to different bit widths

and new systolic pipeline now supports split or single pipeline
JonasDC 3739d 07h /mod_sim_exp/trunk/bench/vhdl/
26 testbench for only the montgommery multiplier JonasDC 3741d 06h /mod_sim_exp/trunk/bench/vhdl/
24 changed names of top-level module to mod_sim_exp_core JonasDC 3744d 15h /mod_sim_exp/trunk/bench/vhdl/
3 updated vhdl sources with new header according to OC design rules and formated code
added makefile and simulation input file for testbench simulation
JonasDC 3756d 06h /mod_sim_exp/trunk/bench/vhdl/
2 First version of VHDL source(working), still contains xilinx primitives and needs to be updated to the OpenCores design rules.. JonasDC 3760d 12h /mod_sim_exp/trunk/bench/vhdl/

powered by: WebSVN 2.1.0

© copyright 1999-2023 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.