OpenCores
URL https://opencores.org/ocsvn/mod_sim_exp/mod_sim_exp/trunk

Subversion Repositories mod_sim_exp

[/] [mod_sim_exp/] [trunk/] [doc/] [src/] [acknowl.tex] - Rev 103

Rev

Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
103 Updated documentation to version 1.5 with dual-clock support JonasDC 3231d 17h /mod_sim_exp/trunk/doc/src/acknowl.tex
92 updated documentation with minor interrupt changes of AXI interface JonasDC 3282d 23h /mod_sim_exp/trunk/doc/src/acknowl.tex
87 updated documentation to version 1.4
core now supports the AXI4-Lite bus
JonasDC 3356d 16h /mod_sim_exp/trunk/doc/src/acknowl.tex
78 updated documentation with new RAM style information JonasDC 3386d 16h /mod_sim_exp/trunk/doc/src/acknowl.tex
47 added documentation for the IP core. JonasDC 3494d 21h /mod_sim_exp/trunk/doc/src/acknowl.tex

powered by: WebSVN 2.1.0

© copyright 1999-2022 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.