OpenCores
URL https://opencores.org/ocsvn/mod_sim_exp/mod_sim_exp/trunk

Subversion Repositories mod_sim_exp

[/] [mod_sim_exp/] [trunk/] [rtl/] [vhdl/] [core/] - Rev 97

Rev

Filtering Options

Clear current filter

Rev Log message Author Age Path
41 removed deprecated files from version control JonasDC 4223d 12h /mod_sim_exp/trunk/rtl/vhdl/core/
39 changed files to remove warnings from synthesis
last cell logic is simplified because of redundant logic
JonasDC 4232d 04h /mod_sim_exp/trunk/rtl/vhdl/core/
38 deprecated design files because of new pipeline structure, will be removed shortly JonasDC 4232d 09h /mod_sim_exp/trunk/rtl/vhdl/core/
37 changed names of some generics of the multiplier.
moved the parameters for the core to the package of the core
testbench now uses this parameters to adapt to different bit widths

and new systolic pipeline now supports split or single pipeline
JonasDC 4236d 06h /mod_sim_exp/trunk/rtl/vhdl/core/
36 found bug in new pipeline structure, now working properly. (tested in sim)
mod_sim_exp_core uses new flexible pipeline as default.
JonasDC 4237d 02h /mod_sim_exp/trunk/rtl/vhdl/core/
34 operand memory now supports custom operand widths, the internal memory stays the fixed 1536 bit, but the bus width is now adjustable to any size below. JonasDC 4237d 06h /mod_sim_exp/trunk/rtl/vhdl/core/
33 default pipeline changed to old version, there seems to be an occasional error with new version. JonasDC 4237d 09h /mod_sim_exp/trunk/rtl/vhdl/core/
32 new systolic pipeline structure now has split pipeline support, tested and verified in simulation. the core now uses this pipeline by default. JonasDC 4237d 10h /mod_sim_exp/trunk/rtl/vhdl/core/
31 put first cell logic of the pipeline in a separate design unit, tested and working JonasDC 4237d 15h /mod_sim_exp/trunk/rtl/vhdl/core/
30 put last cell logic of the pipeline in a separate design unit, tested and working JonasDC 4237d 15h /mod_sim_exp/trunk/rtl/vhdl/core/

< Prev 1 2

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.