OpenCores
URL https://opencores.org/ocsvn/mod_sim_exp/mod_sim_exp/trunk

Subversion Repositories mod_sim_exp

[/] [mod_sim_exp/] [trunk/] [rtl/] [vhdl/] [ram/] - Rev 60

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
60 generic version of the fifo, not device specific anymore, uses dpram_generic
updated comments of RAM templates.
JonasDC 4079d 17h /mod_sim_exp/trunk/rtl/vhdl/ram/
59 added templates that correctly infer RAM, for dual port en true dual port RAM
added general functions file, (used in the two RAM templates)
JonasDC 4079d 17h /mod_sim_exp/trunk/rtl/vhdl/ram/
53 correctly inferred ram for altera dual port ram JonasDC 4084d 00h /mod_sim_exp/trunk/rtl/vhdl/ram/
52 correct inferring of blockram, no additional resources. JonasDC 4084d 00h /mod_sim_exp/trunk/rtl/vhdl/ram/
51 true dual port ram for xilinx JonasDC 4084d 01h /mod_sim_exp/trunk/rtl/vhdl/ram/
50 added folder for ram descriptions
added experimental simple dual port ram implementation for xilinx
JonasDC 4084d 01h /mod_sim_exp/trunk/rtl/vhdl/ram/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.