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URL https://opencores.org/ocsvn/mod_sim_exp/mod_sim_exp/trunk

Subversion Repositories mod_sim_exp

[/] [mod_sim_exp/] [trunk/] [sim/] - Rev 72

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Rev Log message Author Age Path
70 updated testbench for use with new core parameters
updated makefile, added new sources
JonasDC 4127d 07h /mod_sim_exp/trunk/sim/
65 updated plb interface, now modulus is selectable and, fifo depth is adjustable.
updated makefile with new sources and update component in package
JonasDC 4135d 02h /mod_sim_exp/trunk/sim/
41 removed deprecated files from version control JonasDC 4232d 09h /mod_sim_exp/trunk/sim/
35 new test values, 1st exponentiation gives error on result with new pipeline
commit for test purposes
JonasDC 4246d 02h /mod_sim_exp/trunk/sim/
31 put first cell logic of the pipeline in a separate design unit, tested and working JonasDC 4246d 12h /mod_sim_exp/trunk/sim/
30 put last cell logic of the pipeline in a separate design unit, tested and working JonasDC 4246d 12h /mod_sim_exp/trunk/sim/
28 updated makefile for new pipeline sources JonasDC 4247d 02h /mod_sim_exp/trunk/sim/
27 test input values for multiplier_tb JonasDC 4247d 02h /mod_sim_exp/trunk/sim/
24 changed names of top-level module to mod_sim_exp_core JonasDC 4250d 11h /mod_sim_exp/trunk/sim/
11 simulation output folder JonasDC 4261d 06h /mod_sim_exp/trunk/sim/
5 not needed on svn, is generated by testbench JonasDC 4261d 11h /mod_sim_exp/trunk/sim/
3 updated vhdl sources with new header according to OC design rules and formated code
added makefile and simulation input file for testbench simulation
JonasDC 4262d 03h /mod_sim_exp/trunk/sim/

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