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[/] [mod_sim_exp/] [trunk/] [sim/] [Makefile] - Rev 65

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Rev Log message Author Age Path
65 updated plb interface, now modulus is selectable and, fifo depth is adjustable.
updated makefile with new sources and update component in package
JonasDC 4135d 01h /mod_sim_exp/trunk/sim/Makefile
41 removed deprecated files from version control JonasDC 4232d 09h /mod_sim_exp/trunk/sim/Makefile
31 put first cell logic of the pipeline in a separate design unit, tested and working JonasDC 4246d 11h /mod_sim_exp/trunk/sim/Makefile
30 put last cell logic of the pipeline in a separate design unit, tested and working JonasDC 4246d 12h /mod_sim_exp/trunk/sim/Makefile
28 updated makefile for new pipeline sources JonasDC 4247d 02h /mod_sim_exp/trunk/sim/Makefile
24 changed names of top-level module to mod_sim_exp_core JonasDC 4250d 11h /mod_sim_exp/trunk/sim/Makefile
3 updated vhdl sources with new header according to OC design rules and formated code
added makefile and simulation input file for testbench simulation
JonasDC 4262d 02h /mod_sim_exp/trunk/sim/Makefile

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