URL https://opencores.org/ocsvn/neorv32/neorv32/trunk

Subversion Repositories neorv32

[/] [neorv32/] [trunk/] [sim/] [neorv32_tb.vhd] - Rev 12

Rev	Log message	Author	Age	Path
12	Processor version 1.2.0.5 - see changelog in NEORV32.pdf	zero_gravity	1399d 03h	/neorv32/trunk/sim/neorv32_tb.vhd
11	new hardware version, see changelog in NEORV32.pdf	zero_gravity	1408d 23h	/neorv32/trunk/sim/neorv32_tb.vhd
8	added missing FENCE instruction; added optional Zifencei CPU extension	zero_gravity	1412d 21h	/neorv32/trunk/sim/neorv32_tb.vhd
6	new processor version: 1.0.0.0 -> increased performance; debugged errors; processor now passes risc-v compliance tests; see changelog for more information	zero_gravity	1413d 19h	/neorv32/trunk/sim/neorv32_tb.vhd
3	general updates, see changelog in NEORV32.pdf for more information	zero_gravity	1423d 22h	/neorv32/trunk/sim/neorv32_tb.vhd
2	- initial commit	zero_gravity	1425d 00h	/neorv32/trunk/sim/neorv32_tb.vhd