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[/] [open8_urisc/] - Rev 318

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Rev Log message Author Age Path
298 Fixed a long-standing bug in the SBC instruction where the 1 wasn't being added to complete the 2's complement of Rn. This was causing off-by-one errors in subtraction and negating carry only subtractions. jshamlet 688d 19h /open8_urisc/
297 Fixed register map comments jshamlet 979d 03h /open8_urisc/
296 Removed parallel interface from o8_vector_rx.vhd, modified vector_tx.vhd to use a generic for it's seed value, slight formatting change on o8_elapsed_usec.vhd. jshamlet 987d 18h /open8_urisc/
295 Undoing previous revision. UART was fine, bug reporter was not. jshamlet 990d 22h /open8_urisc/
294 Fixed an ancient bug in the parity logic that had the parity inverted. jshamlet 991d 03h /open8_urisc/
293 Fixed formatting issue in o8_sync_serial where tabs were inserted instead of spaces and fixed column spacing as a result (purely cosmetic) jshamlet 1010d 03h /open8_urisc/
292 Updated the o8_trig_delay entity by:
1) Added a global interrupt enable,
2) Added the ability to trigger on both the pre- and post-arm trigger input
3) Added the ability to read the external input on offset 7		 jshamlet 1081d 02h /open8_urisc/
291 Added Notepad++ language definition file for the Open8_II ISA jshamlet 1123d 16h /open8_urisc/
290 Added an additional generic "Rotation_Ignores_Carry" that removes the carry logic from the ROL/ROR instructions such that they now rotate 'normally',
Added an alias for PSR_GP4 named PSR_S, as it is now used to switch the function of the RSP instruction. The internal opcode hasn't changed, but it allows assembly code to use PSR_S or BRS/BNS when performing RSP related operations.		 jshamlet 1123d 16h /open8_urisc/
289 Added back the delay for the cursor home command, since it is slow on most Hitachi compatible LCD panels. jshamlet 1141d 03h /open8_urisc/

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