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[/] [open8_urisc/] [trunk/] - Rev 240

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240 Simplified the vector tx/rx system to a single line. An idle detector replaces the attn_req signal. jshamlet 1474d 16h /open8_urisc/trunk/
239 More cleanup and notation of board to board I/O jshamlet 1474d 21h /open8_urisc/trunk/
238 Removed extraneous reference to Ints.VEC_Flag from task.s, since it is supposed to be in the init function in test_fn.s. jshamlet 1475d 16h /open8_urisc/trunk/
237 Found some errors in the comments and cleaned up unnecessary library references. jshamlet 1475d 19h /open8_urisc/trunk/
236 More software cleanup for the Open8_II project jshamlet 1475d 20h /open8_urisc/trunk/
235 Ok, this time with feeling. jshamlet 1480d 14h /open8_urisc/trunk/
234 Forgot to add documentation jshamlet 1480d 16h /open8_urisc/trunk/
233 Updated the Sample Projects.zip jshamlet 1480d 16h /open8_urisc/trunk/
232 More code cleanup on sample projects. SDLC2LCD should now match the Open8_II project model. jshamlet 1489d 20h /open8_urisc/trunk/
231 Updated sample projects and added elapsed time capture (chronometer) module jshamlet 1489d 20h /open8_urisc/trunk/
230 Added two sample projects that show how to connect and program an Open8 system jshamlet 1493d 07h /open8_urisc/trunk/
229 Created a new version of the system timer with 24-bit, 1-uS resolution. The new timer has a much different register interface, so it is now o8_sys_timer_ii. jshamlet 1493d 18h /open8_urisc/trunk/
228 Added an initialization constant for the OPEN8_BUS_TYPE record. jshamlet 1494d 08h /open8_urisc/trunk/
227 Added a demonstration Open8_cfg.vhd file, which is used to configure the system constants. It also provides a function that makes it easy to merge read buses. jshamlet 1494d 15h /open8_urisc/trunk/
226 Forgot the updated package file... jshamlet 1494d 18h /open8_urisc/trunk/
225 Added Halt_Ack to go with Halt_Req. jshamlet 1494d 18h /open8_urisc/trunk/
224 Finished new Open8 bus record, which now includes the clock, reset and a microsecond tick. The CPU now accepts a clock and pll_locked signal, which it uses to generate the system reset in the bus record. It also contains a simple microsecond counter to feed the usec_tick in the record. This logic was removed from the real time clock and system timer entities, which now use the global version. Bus connections should be dramatically simplified, as only the read logic and interrupts are still run as separate signals. jshamlet 1494d 20h /open8_urisc/trunk/
223 Added an OPEN8_BUS_TYPE record to simplify connection to Open8 modules. The CPU now passes and Open8_Bus out, which supplies the bus address, write enable, write data, and read enable. Read data and interrupts are still handled as separate signals, since they are muxed/connected at the next level up. jshamlet 1495d 13h /open8_urisc/trunk/
222 Created a modified version of the epoch timer with a 32-bit, 1-uS resolution timer/comparator. jshamlet 1495d 19h /open8_urisc/trunk/
221 o8_vdsm8.vhd now has a default value assigned at compile time, o8_register.vhd was cleaned up some more. jshamlet 1496d 13h /open8_urisc/trunk/

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