URL https://opencores.org/ocsvn/open8_urisc/open8_urisc/trunk

Subversion Repositories open8_urisc

[/] [open8_urisc/] [trunk/] - Rev 308

Rev	Log message	Author	Age	Path
288	Removed hard-wired R/Wn output and replaced it with a note that the R/Wn line must be tied low either in firmware or on the board.	jshamlet	1132d 03h	/open8_urisc/trunk/
287	Fixed mangled comments and revisioning dates.	jshamlet	1133d 03h	/open8_urisc/trunk/
286	Added initial cut of a "universal" character LCD driver. Allows for adjustment of address setup, enable high, and cycle times. Also has built-in timers for handling timing on certain commands.	jshamlet	1133d 03h	/open8_urisc/trunk/
285	Added checksum byte to vector tx/rx to avoid issues with serial line noise glitching the receiver. Also modified the transmitted to take any generic argument, rather than canned arguments.	jshamlet	1140d 06h	/open8_urisc/trunk/
284	Corrected the vhdl unit name and description for o8_7seg.vhd	jshamlet	1253d 17h	/open8_urisc/trunk/
283	Altered SDLC bitclock check on TX to NOT block when tested by software, but to instead ignore packet write requests if BClk_Okay is low. This allows software to continue checking BClk_Okay in a polling loop.	jshamlet	1257d 05h	/open8_urisc/trunk/
282	Modified the SDLC core transmit states to have consistent naming.	jshamlet	1257d 05h	/open8_urisc/trunk/
281	Added pre-initialization to the dual-port RAM signals.	jshamlet	1257d 08h	/open8_urisc/trunk/
280	Got rid of silly aliases that connected the dual-port memory and the arbitration logic.	jshamlet	1257d 08h	/open8_urisc/trunk/
279	More comment cleanup	jshamlet	1258d 05h	/open8_urisc/trunk/