OpenCores
URL https://opencores.org/ocsvn/open8_urisc/open8_urisc/trunk

Subversion Repositories open8_urisc

[/] [open8_urisc/] [trunk/] [Documents/] [CPU Instruction Set_files/] - Rev 317

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
312 Added o8_timer24.vhd as a more flexible alternative to o8_sys_timer_ii.vhd.
Also cleaned up some comments in the HTML documentation
jshamlet 356d 14h /open8_urisc/trunk/Documents/CPU Instruction Set_files/
311 Updated documentation to reflect generic switch controlling ROR/ROL behavior and the carry bit jshamlet 400d 10h /open8_urisc/trunk/Documents/CPU Instruction Set_files/
277 Fixed documentation errors related to flags. The UPP ALU instruction only alters the C flag, not the Z or N flags. This implies that using indexed loads or stores with auto post-increment will potentially alter the C flag. jshamlet 1246d 12h /open8_urisc/trunk/Documents/CPU Instruction Set_files/
272 Updated the HTML documentation to reflect the removed generic. jshamlet 1293d 11h /open8_urisc/trunk/Documents/CPU Instruction Set_files/
241 Added an Open8 compatible 7-segment display/decoder and uploaded local/private documentation. jshamlet 1461d 07h /open8_urisc/trunk/Documents/CPU Instruction Set_files/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.