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[/] [open8_urisc/] [trunk/] [VHDL/] - Rev 335


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Rev Log message Author Age Path
335 Switched o8_version.vhd to integer generics to make assignment from higher-level tools simpler,
Uploaded new version of, which uses the newer components
jshamlet 287d 08h /open8_urisc/trunk/VHDL/
334 Updated version register to match task switcher example and rom core for the romtape entity jshamlet 288d 10h /open8_urisc/trunk/VHDL/
333 Fixed missing semicolons in o8_sys_timer_ii.vhd,
Added faulting address capture in the RAM models,
Modified o8_ram_1k.vhd to use 32-bit WPR
jshamlet 288d 21h /open8_urisc/trunk/VHDL/
331 Added custom SPI LCD interface (pending receive side) and watchdog timer. Also modified system timer II to use aliases jshamlet 289d 01h /open8_urisc/trunk/VHDL/
330 Updated to route RAM write fault signal and force CPU interrupts to task manager requirements. jshamlet 295d 08h /open8_urisc/trunk/VHDL/
329 Added a core that specifically supports the task switcher software. It merges o8_int_mgr16 with a wide register, allowing full control of I/O peripherals by the task switcher software. This also allows the task switcher to be enabled for the full 16 I/O write qualification lines, which had previously only been supported in the task data setup. jshamlet 295d 08h /open8_urisc/trunk/VHDL/
327 More bug fixes:
Added write qual line to LTC2355 interface, fixed bug where output data was duplicating the lower byte in the averager, added an initial romtape.hex file
jshamlet 296d 10h /open8_urisc/trunk/VHDL/
326 Minor comment correction jshamlet 302d 07h /open8_urisc/trunk/VHDL/
325 Added the rest of the initializers to the signal assignments jshamlet 302d 08h /open8_urisc/trunk/VHDL/
324 Modified the Open8 version of the multi-channel roll average code to have separate interrupt enables for average and flush operations. Note that the flush status bit should be checked by software prior to use if the Autoflush_On_Reset generic is set TRUE.

Also adding the ROMTAPE entity, which acts as a serial-access ROM for storing strings, arrays, etc. in order to alleviate pressure on the primary program ROM. It is intended for use with loops that load fixed content from ROM.
jshamlet 302d 09h /open8_urisc/trunk/VHDL/
323 Forgot to add files jshamlet 303d 07h /open8_urisc/trunk/VHDL/
322 Performance fixes for the LCD interface,
Fixed incorrect entity name for the dual LTC2355 IF,
Added a CPU-accessible 8-channel averager core and FIFO-style ROM
jshamlet 303d 07h /open8_urisc/trunk/VHDL/
321 Fixed issue with parity flag in receiver sticking jshamlet 407d 00h /open8_urisc/trunk/VHDL/
320 Inverted flow control signals to match EIA-232 specification jshamlet 409d 03h /open8_urisc/trunk/VHDL/
319 Fixed off-by-one error in channel count jshamlet 410d 06h /open8_urisc/trunk/VHDL/
318 Added o8_scale_conv.vhd and intdiv.vhd jshamlet 414d 08h /open8_urisc/trunk/VHDL/
317 Altered the reinit signal on teh adc128s022.vhd driver to be optional, and removed the "dead" signal from the upper level o8_de0_nano_adc_if.vhd code. jshamlet 428d 05h /open8_urisc/trunk/VHDL/
316 More code cleanup and comments,
Removed INT_VECTOR_n constants, as they are superfluous. There are no reasonable situations in which the constants would be altered.
jshamlet 428d 05h /open8_urisc/trunk/VHDL/
315 Added Terasic DE0 Nano ADC interface and rolling averager. jshamlet 428d 06h /open8_urisc/trunk/VHDL/
314 Code cleanup and added comments jshamlet 428d 07h /open8_urisc/trunk/VHDL/

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