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[/] [open8_urisc/] [trunk/] [VHDL/] - Rev 335

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Rev Log message Author Age Path
313 Added all generics to package component jshamlet 352d 17h /open8_urisc/trunk/VHDL/
312 Added o8_timer24.vhd as a more flexible alternative to o8_sys_timer_ii.vhd.
Also cleaned up some comments in the HTML documentation		 jshamlet 352d 18h /open8_urisc/trunk/VHDL/
310 Added optional DACadv signal to advance the PWM engine using an external signal. This is used to synchronize the DAC with other DACs or for streaming multiple streams across a high-speed serial link. jshamlet 423d 20h /open8_urisc/trunk/VHDL/
308 jshamlet 445d 10h /open8_urisc/trunk/VHDL/
307 Fixed comments on o8_version.vhd jshamlet 652d 19h /open8_urisc/trunk/VHDL/
299 Modified the status_led.vhd to slow down the DIM50PCT signal to 1/32 instead of 1/2 for use with shift-register based discrete LEDs and added the ability to chain the toggle signal to save on resources as well as synchronize the "toggling" jshamlet 661d 07h /open8_urisc/trunk/VHDL/
298 Fixed a long-standing bug in the SBC instruction where the 1 wasn't being added to complete the 2's complement of Rn. This was causing off-by-one errors in subtraction and negating carry only subtractions. jshamlet 662d 09h /open8_urisc/trunk/VHDL/
297 Fixed register map comments jshamlet 952d 18h /open8_urisc/trunk/VHDL/
296 Removed parallel interface from o8_vector_rx.vhd, modified vector_tx.vhd to use a generic for it's seed value, slight formatting change on o8_elapsed_usec.vhd. jshamlet 961d 09h /open8_urisc/trunk/VHDL/
295 Undoing previous revision. UART was fine, bug reporter was not. jshamlet 964d 13h /open8_urisc/trunk/VHDL/

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