OpenCores
URL https://opencores.org/ocsvn/open8_urisc/open8_urisc/trunk

Subversion Repositories open8_urisc

[/] - Rev 284

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
284 Corrected the vhdl unit name and description for o8_7seg.vhd jshamlet 1238d 00h /
283 Altered SDLC bitclock check on TX to NOT block when tested by software, but to instead ignore packet write requests if BClk_Okay is low. This allows software to continue checking BClk_Okay in a polling loop. jshamlet 1241d 12h /
282 Modified the SDLC core transmit states to have consistent naming. jshamlet 1241d 12h /
281 Added pre-initialization to the dual-port RAM signals. jshamlet 1241d 15h /
280 Got rid of silly aliases that connected the dual-port memory and the arbitration logic. jshamlet 1241d 15h /
279 More comment cleanup jshamlet 1242d 12h /
278 Flattened the SDLC interface to fewer files and eliminated the package file. jshamlet 1243d 06h /
277 Fixed documentation errors related to flags. The UPP ALU instruction only alters the C flag, not the Z or N flags. This implies that using indexed loads or stores with auto post-increment will potentially alter the C flag. jshamlet 1243d 12h /
276 More comment fixes jshamlet 1278d 09h /
275 Fixed a minor comment error. jshamlet 1280d 03h /
274 Updated comments with more corrections jshamlet 1280d 10h /
273 Updated comments with corrections jshamlet 1280d 12h /
272 Updated the HTML documentation to reflect the removed generic. jshamlet 1290d 11h /
271 Removed deleted generic define. jshamlet 1290d 11h /
270 Moved CPU internal constants to o8_cpu.vhd and replace the generic that set the RSP direction flag with a constant instead. This removes the need to expose internal architectural flags externally.

Also added a hard-coded version register that takes a major and minor value as bytes using generics. This is a read-only register to the CPU.
jshamlet 1290d 11h /
269 Modified the write data path to use separate enumerated states rather than reuse the .reg field to improve performance. jshamlet 1293d 01h /
268 Added a 16-input external interrupt manager and dedicated SPI tx-only transmitter (for use with DACs, etc.). Also updated the soft-DACs with cleaned up HDL. jshamlet 1293d 01h /
267 Corrected the file description to indicate this is an example package. jshamlet 1293d 01h /
266 Accidentally uploaded incorrect example file for Open8_cfg.vhd jshamlet 1293d 01h /
265 Fixed a bug where "reg" wasn't being initialized with Poly_Init at reset. jshamlet 1385d 10h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.