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URL https://opencores.org/ocsvn/open8_urisc/open8_urisc/trunk

Subversion Repositories open8_urisc

[/] - Rev 310

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Rev	Log message	Author	Age	Path
290	Added an additional generic "Rotation_Ignores_Carry" that removes the carry logic from the ROL/ROR instructions such that they now rotate 'normally', Added an alias for PSR_GP4 named PSR_S, as it is now used to switch the function of the RSP instruction. The internal opcode hasn't changed, but it allows assembly code to use PSR_S or BRS/BNS when performing RSP related operations.	jshamlet	1094d 16h	/
289	Added back the delay for the cursor home command, since it is slow on most Hitachi compatible LCD panels.	jshamlet	1112d 02h	/
288	Removed hard-wired R/Wn output and replaced it with a note that the R/Wn line must be tied low either in firmware or on the board.	jshamlet	1112d 23h	/
287	Fixed mangled comments and revisioning dates.	jshamlet	1113d 22h	/
286	Added initial cut of a "universal" character LCD driver. Allows for adjustment of address setup, enable high, and cycle times. Also has built-in timers for handling timing on certain commands.	jshamlet	1113d 22h	/
285	Added checksum byte to vector tx/rx to avoid issues with serial line noise glitching the receiver. Also modified the transmitted to take any generic argument, rather than canned arguments.	jshamlet	1121d 01h	/
284	Corrected the vhdl unit name and description for o8_7seg.vhd	jshamlet	1234d 12h	/
283	Altered SDLC bitclock check on TX to NOT block when tested by software, but to instead ignore packet write requests if BClk_Okay is low. This allows software to continue checking BClk_Okay in a polling loop.	jshamlet	1238d 00h	/
282	Modified the SDLC core transmit states to have consistent naming.	jshamlet	1238d 00h	/
281	Added pre-initialization to the dual-port RAM signals.	jshamlet	1238d 03h	/

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