OpenCores
URL https://opencores.org/ocsvn/open8_urisc/open8_urisc/trunk

Subversion Repositories open8_urisc

[/] - Rev 315

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
315 Added Terasic DE0 Nano ADC interface and rolling averager. jshamlet 359d 23h /
314 Code cleanup and added comments jshamlet 359d 23h /
313 Added all generics to package component jshamlet 360d 01h /
312 Added o8_timer24.vhd as a more flexible alternative to o8_sys_timer_ii.vhd.
Also cleaned up some comments in the HTML documentation		 jshamlet 360d 01h /
311 Updated documentation to reflect generic switch controlling ROR/ROL behavior and the carry bit jshamlet 403d 22h /
310 Added optional DACadv signal to advance the PWM engine using an external signal. This is used to synchronize the DAC with other DACs or for streaming multiple streams across a high-speed serial link. jshamlet 431d 03h /
309 Comment cleanup jshamlet 441d 10h /
308 jshamlet 452d 17h /
307 Fixed comments on o8_version.vhd jshamlet 660d 03h /
306 Moved REINIT_TASK_TABLE_PTR call to INITIALIZE_TASK_STACK jshamlet 664d 04h /
305 More code cleanup - rearranged macros and moved stack init to separate macro jshamlet 664d 04h /
304 Modified TASK_SETUP to use the same macros as the rest of the task switcher and cleaned up the code some more. jshamlet 664d 04h /
303 Fixed working, but "incorrect" code (constants were right, but were named incorrectly jshamlet 664d 16h /
302 Corrected issue where register state wasn't being preserved for user function stubs,
Modified FREEMEM calc to use the region size constant.		 jshamlet 664d 17h /
301 Adding actual task manager files jshamlet 666d 14h /
300 Adding core task manager assembly jshamlet 666d 14h /
299 Modified the status_led.vhd to slow down the DIM50PCT signal to 1/32 instead of 1/2 for use with shift-register based discrete LEDs and added the ability to chain the toggle signal to save on resources as well as synchronize the "toggling" jshamlet 668d 14h /
298 Fixed a long-standing bug in the SBC instruction where the 1 wasn't being added to complete the 2's complement of Rn. This was causing off-by-one errors in subtraction and negating carry only subtractions. jshamlet 669d 16h /
297 Fixed register map comments jshamlet 960d 01h /
296 Removed parallel interface from o8_vector_rx.vhd, modified vector_tx.vhd to use a generic for it's seed value, slight formatting change on o8_elapsed_usec.vhd. jshamlet 968d 16h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.