URL https://opencores.org/ocsvn/openarty/openarty/trunk

Subversion Repositories openarty

[/] [openarty/] [trunk/] [rtl/] [cpu/] - Rev 36

Rev	Log message	Author	Age	Path
36	Lots of changes, see the git changelog for details.	dgisselq	2752d 10h	/openarty/trunk/rtl/cpu/
32	Brought the CPU to its first working version, to include demo.	dgisselq	2762d 08h	/openarty/trunk/rtl/cpu/
30	Network transmit and MIG memory both work now, though the clock speed has been dropped to 80.125MHz.	dgisselq	2763d 01h	/openarty/trunk/rtl/cpu/
25	The memory now works. However, the core speed has been lowered to 81.25MHz to do this. The top level file is no longer fasttop.v, but toplevel.v.	dgisselq	2799d 06h	/openarty/trunk/rtl/cpu/
3	Initial set of files. The flash appears to work, memory hasn't been started, the MDIO controller works in simulation, etc. Everything below fasttop.v works at 200MHz (not the CPU---yet).	dgisselq	2846d 08h	/openarty/trunk/rtl/cpu/