URL https://opencores.org/ocsvn/openarty/openarty/trunk

Subversion Repositories openarty

[/] [openarty/] [trunk/] [rtl/] [cpu/] [zipsystem.v] - Rev 50

Rev	Log message	Author	Age	Path
50	Updated the CPU and distribution in general to handle 8-bit bytes.	dgisselq	2590d 16h	/openarty/trunk/rtl/cpu/zipsystem.v
43	Cleaned up the CPU memory documentation.	dgisselq	2735d 10h	/openarty/trunk/rtl/cpu/zipsystem.v
32	Brought the CPU to its first working version, to include demo.	dgisselq	2751d 17h	/openarty/trunk/rtl/cpu/zipsystem.v
3	Initial set of files. The flash appears to work, memory hasn't been started, the MDIO controller works in simulation, etc. Everything below fasttop.v works at 200MHz (not the CPU---yet).	dgisselq	2835d 17h	/openarty/trunk/rtl/cpu/zipsystem.v