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[/] [openarty/] [trunk/] [rtl/] [cpu] - Rev 32

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32 Brought the CPU to its first working version, to include demo. dgisselq 2762d 22h /openarty/trunk/rtl/cpu
30 Network transmit and MIG memory both work now, though the clock speed has
been dropped to 80.125MHz.
dgisselq 2763d 14h /openarty/trunk/rtl/cpu
25 The memory now works. However, the core speed has been lowered to 81.25MHz
to do this. The top level file is no longer fasttop.v, but toplevel.v.
dgisselq 2799d 20h /openarty/trunk/rtl/cpu
3 Initial set of files. The flash appears to work, memory hasn't been started,
the MDIO controller works in simulation, etc. Everything below fasttop.v works
at 200MHz (not the CPU---yet).
dgisselq 2846d 22h /openarty/trunk/rtl/cpu

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