OpenCores
URL https://opencores.org/ocsvn/openarty/openarty/trunk

Subversion Repositories openarty

[/] [openarty/] [trunk/] [sw/] - Rev 30

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
30 Network transmit and MIG memory both work now, though the clock speed has
been dropped to 80.125MHz.
dgisselq 2763d 07h /openarty/trunk/sw/
22 A useful script for programming the device, given that the current device
program includes a valid comms interface.
dgisselq 2828d 07h /openarty/trunk/sw/
18 The device can now program and configure itself, allowing bootstrap possibilities.
`
dgisselq 2828d 07h /openarty/trunk/sw/
16 This returns the scope to its original configuration, where the decode()
function is not allowed to have any side effects.
dgisselq 2830d 07h /openarty/trunk/sw/
14 All changes made as a part of getting the flash driver up and running. Today,
it successfully programmed a configuration into the Arty via wbprogram, so ...
that's been my last/best test.
dgisselq 2830d 08h /openarty/trunk/sw/
6 Minor updates, mostly to support the development of the DDR3 SDRAM--such
as creating addresses for the debugging scope used to figure out what's
going on with it.
dgisselq 2831d 11h /openarty/trunk/sw/
4 Initial host software pack. dgisselq 2846d 14h /openarty/trunk/sw/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.