URL https://opencores.org/ocsvn/openarty/openarty/trunk

Subversion Repositories openarty

[/] [openarty/] [trunk/] [sw/] [host/] [port.h] - Rev 30

Rev	Log message	Author	Age	Path
30	Network transmit and MIG memory both work now, though the clock speed has been dropped to 80.125MHz.	dgisselq	2762d 18h	/openarty/trunk/sw/host/port.h
6	Minor updates, mostly to support the development of the DDR3 SDRAM--such as creating addresses for the debugging scope used to figure out what's going on with it.	dgisselq	2830d 21h	/openarty/trunk/sw/host/port.h
4	Initial host software pack.	dgisselq	2846d 01h	/openarty/trunk/sw/host/port.h