URL https://opencores.org/ocsvn/openarty/openarty/trunk

Subversion Repositories openarty

[/] - Rev 55

Rev	Log message	Author	Age	Path
35	Added comments and copyright notice.	dgisselq	2774d 07h	/
34	These updates bring the distribution along to the point where both the GPS clock subsecond tracking, as well as the OLEDrgb controller now work.	dgisselq	2774d 09h	/
33	Fixed the network receive CRC and MAC checking, and added ip-checking and minimum packet length checking to the receiver.	dgisselq	2779d 15h	/
32	Brought the CPU to its first working version, to include demo.	dgisselq	2780d 18h	/
31	Initial network is now working. Adding CPU control files to repository.	dgisselq	2781d 10h	/
30	Network transmit and MIG memory both work now, though the clock speed has been dropped to 80.125MHz.	dgisselq	2781d 10h	/
29	Here's the memory pin list, necessary for running Xilinx's Memory Interface Generator.	dgisselq	2809d 07h	/
28	Including the updates and corrections from the wbuart32 project.	dgisselq	2809d 07h	/
27	Bus changes ...	dgisselq	2809d 07h	/
26	Adjusted the timing comments.	dgisselq	2809d 07h	/