URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [bin/] [msp430sim_c] - Rev 122

Rev	Log message	Author	Age	Path
122	Add coverage report generation (NCVERILOG only) Add support for the ISIM Xilinx simulator.	olivier.girard	4603d 00h	/openmsp430/trunk/core/sim/rtl_sim/bin/msp430sim_c
98	Added support for VCS verilog simulator. VPD and TRN waveforms can now be generated.	olivier.girard	4822d 01h	/openmsp430/trunk/core/sim/rtl_sim/bin/msp430sim_c
76	Add possibility to simulate C code within the "core" environment.	olivier.girard	4924d 00h	/openmsp430/trunk/core/sim/rtl_sim/bin/msp430sim_c