OpenCores
URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [src/] [tA_output.v] - Rev 202

Rev

Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
202 Add DMA interface support + LINT cleanup olivier.girard 3230d 14h /openmsp430/trunk/core/sim/rtl_sim/src/tA_output.v
180 Add new ASIC_CLOCKING configuration option to allow ASIC implementations with FPGA clocking scheme.
Thanks to Sebastien Van Cauwenberghe's contribution :-)
olivier.girard 4086d 13h /openmsp430/trunk/core/sim/rtl_sim/src/tA_output.v
134 Add full ASIC support (low-power modes, DFT, ...).
Improved serial debug interface reliability.
olivier.girard 4426d 14h /openmsp430/trunk/core/sim/rtl_sim/src/tA_output.v
19 added SVN property for keywords olivier.girard 5387d 13h /openmsp430/trunk/core/sim/rtl_sim/src/tA_output.v
18 Updated headers with SVN info olivier.girard 5387d 13h /openmsp430/trunk/core/sim/rtl_sim/src/tA_output.v
2 Upload complete openMSP430 project to the SVN repository olivier.girard 5422d 13h /openmsp430/trunk/core/sim/rtl_sim/src/tA_output.v

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.