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Rev Log message Author Age Path
182 Minor update to reflect new ASIC_CLOCKING option. olivier.girard 4109d 16h /
181 Update with latest oMSP Core version. olivier.girard 4109d 16h /
180 Add new ASIC_CLOCKING configuration option to allow ASIC implementations with FPGA clocking scheme.
Thanks to Sebastien Van Cauwenberghe's contribution :-)
olivier.girard 4109d 16h /
179 Update all linker scripts with a simplified version.
Thanks to Mihai M. for this one :-)
olivier.girard 4118d 16h /
178 Update all linker scripts with a simplified version.
Thanks to Mihai M. for this one :-)
olivier.girard 4118d 16h /
177 Update ChangeLog olivier.girard 4135d 16h /
176 Update FPGA projects with latest openMSP430 core RTL olivier.girard 4135d 16h /
175 Update hardware breakpoint unit with the followings:
- fixed hardware breakpoint bug with CALL instructions.
- modified data read watchpoint behavior to also trigger with read/modify/write instructions.
- removed unused ports.
olivier.girard 4135d 16h /
174 Cleanup dmem_wr generation logic. Important note: this is not a bug fix, only beautification. olivier.girard 4135d 16h /
173 Update ChangeLog olivier.girard 4169d 14h /

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