OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] - Rev 203

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
203 Fixed LIB_SPEC and STARTFILE_SPEC for newlib jeremybennett 5062d 03h /openrisc/
202 Adding executed log in binary format capability to or1ksim julius 5062d 06h /openrisc/
201 Fixed ordering of the newlib include directory (should be after system includes, not before). jeremybennett 5062d 13h /openrisc/
200 Updated to put newlib in a custom location. jeremybennett 5063d 04h /openrisc/
199 Fixes to SPECs to pick up newlib in custom locations. jeremybennett 5063d 04h /openrisc/
198 A collection of minor tidy ups. jeremybennett 5063d 05h /openrisc/
197 Fixed bug in memory allocator. jeremybennett 5065d 08h /openrisc/
196 Fixed name for newlib install option. jeremybennett 5065d 08h /openrisc/
195 Adding linux and uClibc paths back for patches, updated gnu-src build script making newlib an option (off by deafult) julius 5065d 08h /openrisc/
194 Tidied up code setjmp and longjmp into their own files, and adjusted Makefile accordingly. Simplified cache setup in startup code. Replaced calls via register with calls using immediate address. jeremybennett 5066d 02h /openrisc/
193 Record changes to initfini.c jeremybennett 5066d 02h /openrisc/
192 Updated to fix problems with initfini assembler fragments. jeremybennett 5066d 02h /openrisc/
191 Updated to clarify use of r9 in the l.jalr delay slot. jeremybennett 5066d 02h /openrisc/
190 Allow the Or1ksim installation directory to be set by option. jeremybennett 5066d 08h /openrisc/
189 Fuller explanation of the build script given. jeremybennett 5066d 08h /openrisc/
188 More rigorous testing of options. jeremybennett 5066d 09h /openrisc/
187 Or1200 sprs FPU update julius 5068d 01h /openrisc/
186 OR1200 RTL FPU fix - RF writeback signal working properly again julius 5068d 04h /openrisc/
185 Adding single precision FPU to or1200, initial checkin, not fully tested yet julius 5068d 05h /openrisc/
184 Fix the UART version of newlib. jeremybennett 5069d 09h /openrisc/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.