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Rev Log message Author Age Path
382 New uClibc patch - to be built with 1.0 toolchain julius 4981d 02h /openrisc/
381 Crossbuild script for 1.0 updated to use new GCC rc2 patch and linux-2.6.35 julius 4981d 02h /openrisc/
380 Adding new Linux-2.6.35 patch, to be built with new 1.0 toolchain julius 4981d 02h /openrisc/
379 Linux-2.6.34 patch update - ethernet stability fix and USB host (ohs900) startup device detect improvement julius 4981d 03h /openrisc/
378 Adding gcc-4.5.1 patches to enable kernel to build again julius 4981d 07h /openrisc/
377 gcc-4.5.1/gcc/config/or32/or32.c:
Swap INTVAL for REGNO in or32_legitimate_address_p fixing 64-bit
machine build errors.		 julius 4981d 23h /openrisc/
376 Adding handling cases for RSP queries seen from new gdb-7.2 in RSP servers in
or1ksim and or_debug_proxy.

Adding ChangeLog to or_debug_proxy		 julius 4986d 10h /openrisc/
375 ORPmon update for compatibility with OR toolchain 1.0rc1 julius 4987d 03h /openrisc/
374 ORPSoCv2 adding some files forgotten from last checkin julius 4987d 03h /openrisc/
373 ORPSoCv2 software update for compatibility with OR toolchain 1.0 julius 4987d 03h /openrisc/
372 Toolchain install script uClibc variable update julius 4987d 06h /openrisc/
371 Toolchain install script binutils commented out fix julius 4987d 07h /openrisc/
370 Toolchain install script uclibc url fix julius 4987d 07h /openrisc/
369 Toolchain build script binutils path fix julius 4987d 07h /openrisc/
368 Toolchain script: adding sim url path julius 4987d 08h /openrisc/
367 Fixup 1.0 release script julius 4987d 08h /openrisc/
366 Version 1.0 toolchain script commit julius 4987d 08h /openrisc/
365 Linux-2.6.34 patch update with updated USB ohs900 host julius 4990d 02h /openrisc/
364 OR1200 passes verilator lint. Mainly fixes to widths, and all case statements
altered to casez and Xs changed to ?s.

OR1200 PIC default width back to 31 (was accidentally changed to ORPSoC's 20
last checkin)

OR1200 spec updated to version 0.9, various updates.

OR1200 in ORPSoC and main OR1200 in sync, only difference is defines.		 julius 4999d 01h /openrisc/
363 ORPSoC's RTL code fixed to pass linting by Verilator.

ORPSoC's debug interface disabled for now in both RTL and System C top level.

Profiled building of cycle-accurate model now done correctly.		 julius 4999d 11h /openrisc/

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