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Rev Log message Author Age Path
511 Tagging the 0.5.1rc1 release of Or1ksim jeremybennett 4774d 00h /openrisc/
510 Updates for release 0.5.1rc1. jeremybennett 4774d 00h /openrisc/
509 Tagging the 0.5.0rc3 release of Or1ksim jeremybennett 4774d 00h /openrisc/
508 Updates for Or1ksim 0.5.0rc3. jeremybennett 4774d 23h /openrisc/
507 Newlib libgloss board support update. Corresponding GCC port changes to support it. julius 4780d 20h /openrisc/
506 ORPSoC or1200 interrupt and syscall generation test julius 4781d 19h /openrisc/
505 OR1200 overflow detection fixup

SPIflash program update

or1200 driver library timer improvement		 julius 4781d 20h /openrisc/
504 ORPSoC ALU update with new comparison configuration option, software test for comparisons and register file comment cleanup julius 4798d 16h /openrisc/
503 ORPSoC's or1200 defines fix to indicate we don't actually have I/DMMU invalidate registers. julius 4799d 12h /openrisc/
502 ORPSoC update - or1200, ethmac Xilinx fifos
or1200 in ORPSoC has carry bit, overflow bit, and range exception added and tested. New software tests in ORPSoC library. Ml501 build had ethmac fifos added, and or1200_defines updated to use these new or1200 features by default		 julius 4801d 16h /openrisc/
501 ORPSoC or1200 mult/mac/divide unit serial arith bug fixed.
ORPSoC or1200 defines now use serial divide by default		 julius 4802d 16h /openrisc/
500 ORPSoC's System C UART model can now accept input from stdin during simulation to drive consoles etc

ML501 simulation makefile update to allow custom ELFs to be specified		 julius 4802d 19h /openrisc/
499 ORPSoC OR1200 updates - added l.ext instructions with tests, ammended some MAC bugs, decode stage cleanup julius 4803d 12h /openrisc/
498 or_debug_proxy updates to documentation and Makefile related to latest ftd2xx driver, julius 4805d 01h /openrisc/
497 or_debug_proxy updates julius 4805d 21h /openrisc/
496 ORPSoC ml501 updates - increased frequency, updated documentation julius 4805d 23h /openrisc/
495 ORPSoC adding more accessor functions to Micron SDRAM model. julius 4805d 23h /openrisc/
494 Change to ensure handles ctrl-C correctly with empty line. jeremybennett 4816d 16h /openrisc/
493 ORPSoC VPI JTAG interface, hopefully fix 64-bit machine compile issues. julius 4819d 01h /openrisc/
492 ORPSoC VPI interface for modelsim and documentation update julius 4819d 23h /openrisc/

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