Rev |
Log message |
Author |
Age |
Path |
513 |
Tagging the 1.0rc3 release of GDB 7.2 for the OpenRISC 1000 |
jeremybennett |
4779d 17h |
/openrisc/ |
512 |
Updates for release 1.0rc3 for the OpenRISC 1000. |
jeremybennett |
4779d 17h |
/openrisc/ |
511 |
Tagging the 0.5.1rc1 release of Or1ksim |
jeremybennett |
4780d 16h |
/openrisc/ |
510 |
Updates for release 0.5.1rc1. |
jeremybennett |
4780d 16h |
/openrisc/ |
509 |
Tagging the 0.5.0rc3 release of Or1ksim |
jeremybennett |
4780d 17h |
/openrisc/ |
508 |
Updates for Or1ksim 0.5.0rc3. |
jeremybennett |
4781d 16h |
/openrisc/ |
507 |
Newlib libgloss board support update. Corresponding GCC port changes to support it. |
julius |
4787d 12h |
/openrisc/ |
506 |
ORPSoC or1200 interrupt and syscall generation test |
julius |
4788d 11h |
/openrisc/ |
505 |
OR1200 overflow detection fixup
SPIflash program update
or1200 driver library timer improvement |
julius |
4788d 12h |
/openrisc/ |
504 |
ORPSoC ALU update with new comparison configuration option, software test for comparisons and register file comment cleanup |
julius |
4805d 08h |
/openrisc/ |
503 |
ORPSoC's or1200 defines fix to indicate we don't actually have I/DMMU invalidate registers. |
julius |
4806d 04h |
/openrisc/ |
502 |
ORPSoC update - or1200, ethmac Xilinx fifos
or1200 in ORPSoC has carry bit, overflow bit, and range exception added and tested. New software tests in ORPSoC library. Ml501 build had ethmac fifos added, and or1200_defines updated to use these new or1200 features by default |
julius |
4808d 08h |
/openrisc/ |
501 |
ORPSoC or1200 mult/mac/divide unit serial arith bug fixed.
ORPSoC or1200 defines now use serial divide by default |
julius |
4809d 08h |
/openrisc/ |
500 |
ORPSoC's System C UART model can now accept input from stdin during simulation to drive consoles etc
ML501 simulation makefile update to allow custom ELFs to be specified |
julius |
4809d 11h |
/openrisc/ |
499 |
ORPSoC OR1200 updates - added l.ext instructions with tests, ammended some MAC bugs, decode stage cleanup |
julius |
4810d 04h |
/openrisc/ |
498 |
or_debug_proxy updates to documentation and Makefile related to latest ftd2xx driver, |
julius |
4811d 17h |
/openrisc/ |
497 |
or_debug_proxy updates |
julius |
4812d 13h |
/openrisc/ |
496 |
ORPSoC ml501 updates - increased frequency, updated documentation |
julius |
4812d 15h |
/openrisc/ |
495 |
ORPSoC adding more accessor functions to Micron SDRAM model. |
julius |
4812d 15h |
/openrisc/ |
494 |
Change to ensure handles ctrl-C correctly with empty line. |
jeremybennett |
4823d 09h |
/openrisc/ |
493 |
ORPSoC VPI JTAG interface, hopefully fix 64-bit machine compile issues. |
julius |
4825d 17h |
/openrisc/ |
492 |
ORPSoC VPI interface for modelsim and documentation update |
julius |
4826d 15h |
/openrisc/ |
491 |
ORPSoC or1200_monitor update. |
julius |
4827d 02h |
/openrisc/ |
490 |
Updates to fix spurious test failures and register scheduling. |
jeremybennett |
4831d 08h |
/openrisc/ |
489 |
ORPSoC sw cleanup. Remove warnings. |
julius |
4836d 14h |
/openrisc/ |
488 |
ORPSoC OR1200 driver - tick timer exception handler reverted to generic - cpu tick function hook used as default in handler table. OR1200 timer demo sw for board added. |
julius |
4836d 15h |
/openrisc/ |
487 |
ORPSoC main software makefile update |
julius |
4839d 13h |
/openrisc/ |
486 |
ORPSoC updates, mainly software, i2c driver |
julius |
4839d 13h |
/openrisc/ |
485 |
ORPSoC updates - or1200 monitor now has separate defines file, ethmac updates to fifos and wishbone IF, board.h changes for UART (may propegate to other drivers with multiple cores, we'll see), crt0.S for or1200 now zeros all registers on reset, adding own ethernet tests for ML501 |
julius |
4843d 17h |
/openrisc/ |
484 |
Changes to make r12 call-saved and to bring wchar tests in line. |
jeremybennett |
4844d 15h |
/openrisc/ |