OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] - Rev 795

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
795 Created or1200_rel3 branch from rev 794 olof 4395d 15h /openrisc/
794 ORPSoC, or1200: split out or1200_fpu_intfloat_conv_except module into own file

Fixes lint warnings.
julius 4401d 01h /openrisc/
793 Corrected Julius Baxter's email address in MAINTAINERS jeremybennett 4412d 00h /openrisc/
792 Added a MAINTAINERS file.

012-04-07 Jeremy Bennett <jeremy.bennett@embecosm.com>

* MAINTAINERS: Added.
* configure: Regenerated.
* configure.ac: Updated version.
jeremybennett 4412d 00h /openrisc/
791 Added options to configure RAM and ROM sizes. Fixed cache handling. skrzyp 4414d 18h /openrisc/
790 fixed issues with context switching, interrupts, optimizations and cleanups skrzyp 4421d 18h /openrisc/
789 ORPSoC: Patch from R Diez to make RTL sim report l.nops have equivalent formatting to those from or1ksim

Signed-off-by: R Diez <rdiezmail-openrisc@yahoo.de>
Acked-by: Julius Baxter <juliusbaxter@gmail.com>
julius 4425d 14h /openrisc/
788 or1200: Patch from R Diez to remove l.cust5 signal from a sensitivty list when it's not defined.

Signed-off-by: R Diez <rdiezmail-openrisc@yahoo.de>
Acked-by: Julius Baxter <juliusbaxter@gmail.com>
julius 4425d 15h /openrisc/
787 Patch from R Diez to zero R0 on startup. ChangeLog from testsuite/test-code-or1k:

2012-03-23 Jeremy Bennett <jeremy.bennett@embecosm.com>

Patch from R Diez <rdiezmail-openrisc@yahoo.de>

* cache/cache-asm.S, cfg/cfg.S, except-test/except-test-s.S,
* except/except.S, ext/ext.S, flag/flag.S, fp/fp.S,
* inst-set-test/inst-set-test.S, int-test/int-test.S,
* mc-common/except-mc.S, uos/except-or32.S: Clear R0 on
start-up. There is no guarantee that R0 is hardwired to zero, and
indeed it is not when simulating the or1200 Verilog core.
* configure: Regenerated.
* configure.ac: Updated version.
jeremybennett 4426d 23h /openrisc/
786 new ecos tree (tracking mainline) skrzyp 4426d 23h /openrisc/
785 We are about to upload a new tree (that has a different structure) skrzyp 4427d 00h /openrisc/
784 Patch from R Diez to ensure DejaGnu handles errors better. Autoconf infrastructure all updated.

2012-03-21 Jeremy Bennett <jeremy.bennett@embecosm.com>

Patch from R Diez <rdiezmail-openrisc@yahoo.de>

* Makefile.am: Add AM_RUNTESTFLAGS to trigger correct error
behaviour.
jeremybennett 4428d 14h /openrisc/
783 Initial dev directory snapshot with FSF GCC mainline jeremybennett 4442d 12h /openrisc/
782 Tags directory for GNU development tool chain. jeremybennett 4442d 12h /openrisc/
781 Initial check-in of GCC, with properties matching the upstream. jeremybennett 4444d 23h /openrisc/
780 Initial check-in of GCC, with properties matching the upstream. jeremybennett 4447d 14h /openrisc/
779 Initial check-in of GCC, with properties matching the upstream. jeremybennett 4447d 14h /openrisc/
778 Initial check-in of GCC, with properties matching the upstream. jeremybennett 4447d 14h /openrisc/
777 Initial check-in of GCC, with properties matching the upstream. jeremybennett 4447d 14h /openrisc/
776 Initial check-in of GCC, with properties matching the upstream. jeremybennett 4447d 14h /openrisc/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.