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[/] [openrisc/] [branches/] [or1200_rel3] - Rev 795

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353 OR1200 RTL and ORPSoCv2 update, fixing Verilator build capability.
* or1200/rtl/verilog/or1200_sprs.v: Verilator public and access comments
* orpsocv2/rtl/verilog/components/or1200/or1200_sprs.v: ""
* or1200/rtl/verilog/or1200_ctrl.v: Verilator public and access comments
* orpsocv2/rtl/verilog/components/or1200/or1200_ctrl.v: ""
* or1200/rtl/verilog/or1200_except.v: Verilator public and access comments
* orpsocv2/rtl/verilog/components/or1200/or1200_except.v: ""
* orpsocv2/rtl/verilog/components/wb_ram_b3/wb_ram_b3.v: Some
Verilator related Lint issues fixed.

ORPSoCv2: Removed bus arbiter snooping functions from OrpsocAccess and
updated RAM model hooks for new RAM.
* orpsocv2/bench/sysc/include/Or1200MonitorSC.h: Remove arbiter snooping
* orpsocv2/bench/sysc/src/Or1200MonitorSC.cpp: ""
* orpsocv2/bench/sysc/include/OrpsocAccess.h: Remove arbiter snooping,
change include and classes for new RAM model.
* orpsocv2/bench/sysc/src/OrpsocAccess.cpp: ""

or_debug_proxy - fixing sleep and Windows make issues:
* or_debug_proxy/src/gdb.c: Removed all sleep - still to be fixed properly
* or_debug_proxy/Makefile: Remove VPI file when building on Cygwin (deprecated)

ORPmon play around, various changes to low level files.		 julius 4987d 17h /openrisc/branches/or1200_rel3
352 OR1200 RTL DC sensitivity list fix julius 4988d 15h /openrisc/branches/or1200_rel3
260 Fixed `define in FPU that didnt need to be there julius 4994d 13h /openrisc/branches/or1200_rel3
259 Fixing or1200_defines FPU module selection defines - They are no longer needed julius 4996d 09h /openrisc/branches/or1200_rel3
258 Big OR1200 update - FPU, data cache write-back added, spec updated, ODT format doc now main one, default config set to both caches 8K, all integer arithmetic, FPU off julius 4996d 09h /openrisc/branches/or1200_rel3
187 Or1200 sprs FPU update julius 5046d 14h /openrisc/branches/or1200_rel3
186 OR1200 RTL FPU fix - RF writeback signal working properly again julius 5046d 16h /openrisc/branches/or1200_rel3
185 Adding single precision FPU to or1200, initial checkin, not fully tested yet julius 5046d 17h /openrisc/branches/or1200_rel3
151 OR1200 rel3 (added some files that were not checked-in earlier) marcus.erlandsson 5055d 13h /openrisc/branches/or1200_rel3
142 added OpenRISC version rel3 marcus.erlandsson 5057d 21h /openrisc/branches/or1200_rel3

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