OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [tags/] [gnu-src/] [gcc-4.5.1/] [gcc-4.5.1-or32-1.0rc4] - Rev 519

Rev

Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
378 Adding gcc-4.5.1 patches to enable kernel to build again julius 4979d 16h /openrisc/tags/gnu-src/gcc-4.5.1/gcc-4.5.1-or32-1.0rc4
377 gcc-4.5.1/gcc/config/or32/or32.c:
Swap INTVAL for REGNO in or32_legitimate_address_p fixing 64-bit
machine build errors.
julius 4980d 07h /openrisc/tags/gnu-src/gcc-4.5.1/gcc-4.5.1-or32-1.0rc4
336 Corrected for 4.5.1-or32-1.0rc1 jeremybennett 5004d 10h /openrisc/tags/gnu-src/gcc-4.5.1/gcc-4.5.1-or32-1.0rc4
335 Updated version number to 4.5.1-or32-1.0. jeremybennett 5004d 10h /openrisc/tags/gnu-src/gcc-4.5.1/gcc-4.5.1-or32-1.0rc4
334 Record changes to the documentation and option handling. jeremybennett 5004d 10h /openrisc/tags/gnu-src/gcc-4.5.1/gcc-4.5.1-or32-1.0rc4
333 Fix the default option (to use -mhard-mul). Update the documentation for
OpenRISC.
jeremybennett 5004d 10h /openrisc/tags/gnu-src/gcc-4.5.1/gcc-4.5.1-or32-1.0rc4
332 Provide support for nested functions. Tidy up board specification.

* config/or32/or32-protos.c <or32_trampoline_code_size>: Added.
* config/or32/or32.c <OR32_MOVHI, OR32_ORI, OR32_LWZ, OR32_JR>:
New macros added.
(or32_emit_mode, or32_emit_binary, or32_force_binary)
(or32_trampoline_code_size, or32_trampoline_init): Created.
(or32_output_bf): Tabbing fixed.
<TARGET_TRAMPOLINE_INIT>: Definition added.
* config/or32/or32.h <STATIC_CHAIN_REGNUM>: Uses R11.
<TRAMPOLINE_SIZE>: redefined.
<TRAMPOLINE_ENVIRONMENT>: Added definition.
jeremybennett 5005d 09h /openrisc/tags/gnu-src/gcc-4.5.1/gcc-4.5.1-or32-1.0rc4
329 Baseline GCC 4.5.1 port for the OpenRISC 1000 jeremybennett 5006d 05h /openrisc/tags/gnu-src/gcc-4.5.1/gcc-4.5.1-or32-1.0rc4
328 Baseline GCC 4.5.1 port for the OpenRISC 1000 jeremybennett 5006d 05h /openrisc/tags/gnu-src/gcc-4.5.1/gcc-4.5.1-or32-1.0rc4
327 Baseline GCC 4.5.1 port for the OpenRISC 1000 jeremybennett 5006d 05h /openrisc/tags/gnu-src/gcc-4.5.1/gcc-4.5.1-or32-1.0rc4

< Prev 1 2

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.