OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [tags/] [or1ksim/] [or1ksim-0.4.0rc1/] [debug/] - Rev 105

Rev

Filtering Options

Clear current filter

Rev Log message Author Age Path
105 Tagging the 0.4.0rc1 candidate release of Or1ksim jeremybennett 5097d 11h /openrisc/tags/or1ksim/or1ksim-0.4.0rc1/debug/
101 ChangeLog updated for floating point support. Fixed bug in generic peripheral upcalls. Upped release date in configure.ac. Removed redundant debugging print in abstract.c jeremybennett 5106d 05h /openrisc/trunk/or1ksim/debug/
98 Comprehensive testing of the library JTAG interface. Updates to the documentation to warn of issues in using the memory controller. jeremybennett 5112d 06h /openrisc/trunk/or1ksim/debug/
97 Updates to test the new JTAG library interface (not yet complete). jeremybennett 5126d 12h /openrisc/trunk/or1ksim/debug/
96 Various changes which had not been picked up in earlier commits. jeremybennett 5127d 14h /openrisc/trunk/or1ksim/debug/
91 Tidy up of some obsolete configuration code. jeremybennett 5140d 03h /openrisc/trunk/or1ksim/debug/
90 Reorganized to allow tests with both native code (for the library) and OpenRISC code (which requires the target tool chain). jeremybennett 5140d 04h /openrisc/trunk/or1ksim/debug/
85 Bug 1773 (RSP usage with ELF image preloaded) fixed. jeremybennett 5140d 12h /openrisc/trunk/or1ksim/debug/
82 Major restructuring of the testbench, now named testsuite to bring it into the main package with its own configuration. Uses DejaGNU and builds using a standard top level "make check".

Incorporate Mark Jarvis's fixes for Mac OS X.		 jeremybennett 5141d 03h /openrisc/trunk/or1ksim/debug/
80 Add missing configuration files to SVN. jeremybennett 5141d 07h /openrisc/trunk/or1ksim/debug/
19 Initial commit of Or1ksim 0.3.0 into the new repository jeremybennett 5471d 12h /openrisc/trunk/or1ksim/debug/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.