URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [tags/] [or1ksim/] [or1ksim-0.4.0rc1/] [sim-config.h] - Rev 105

Rev	Log message	Author	Age	Path
105	Tagging the 0.4.0rc1 candidate release of Or1ksim	jeremybennett	5097d 10h	/openrisc/tags/or1ksim/or1ksim-0.4.0rc1/sim-config.h
100	Single precision FPU stuff for or1ksim	julius	5106d 06h	/openrisc/trunk/or1ksim/sim-config.h
98	Comprehensive testing of the library JTAG interface. Updates to the documentation to warn of issues in using the memory controller.	jeremybennett	5112d 05h	/openrisc/trunk/or1ksim/sim-config.h
93	Additional library tests. Key difference is change to Or1ksim library interface for upcalls to bring closer in to line with SystemC TLM 2.0.	jeremybennett	5133d 03h	/openrisc/trunk/or1ksim/sim-config.h
82	Major restructuring of the testbench, now named testsuite to bring it into the main package with its own configuration. Uses DejaGNU and builds using a standard top level "make check". Incorporate Mark Jarvis's fixes for Mac OS X.	jeremybennett	5141d 02h	/openrisc/trunk/or1ksim/sim-config.h
19	Initial commit of Or1ksim 0.3.0 into the new repository	jeremybennett	5471d 11h	/openrisc/trunk/or1ksim/sim-config.h