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Rev Log message Author Age Path
408 ORPSoC update - adding support for ORSoC development board, many changes, documentation update, too. julius 4947d 19h /openrisc/trunk/
407 Update or1ksim version in toolchain script to rc2 julius 4947d 22h /openrisc/trunk/
406 ORPmon indented files, bus, align and instruction errors vectors printf and reboot julius 4947d 22h /openrisc/trunk/
405 ORPmon updates - ethernet driver updates julius 4948d 03h /openrisc/trunk/
404 New scripts to build separate bare metal and Linux tool chains. Fixes to GDB so it builds with the Linux tool chain and uses RELA. Other minor fixes to the GCC tool chain. jeremybennett 4948d 03h /openrisc/trunk/
403 ORPSoC big upgrade - intermediate check in. Lots still missing. To come very shortly. julius 4949d 01h /openrisc/trunk/
402 Further updates to the compiler jeremybennett 4949d 05h /openrisc/trunk/
401 Fixing find first one (ff1) and find last one (fl1) support in OR1200.

Updated documentation, adding missing l.ff1 and l.fl1 opcodes to supported
instructions table.
julius 4949d 06h /openrisc/trunk/
400 Updates to the linker, GCC, newlib and GDB in preparation for supporting C++. The key changes are that the linker now uses RELA and that GCC may save registers at the bottom of the stack before the frame is allocated or after it is deallocated, so exception handlers/thread primitives should not use the first 130 bytes after the SP. jeremybennett 4949d 06h /openrisc/trunk/
399 Updates to the linker, GCC, newlib and GDB in preparation for supporting C++. The key changes are that the linker now uses RELA and that GCC may save registers at the bottom of the stack before the frame is allocated or after it is deallocated, so exception handlers/thread primitives should not use the first 130 bytes after the SP. jeremybennett 4949d 08h /openrisc/trunk/
398 ORPSoCv2 removing generic backend path - not needed julius 4950d 08h /openrisc/trunk/
397 ORPSoCv2:

doc/ path added, with Texinfo documentation. Still a work in progress.

VPI files updated.

OR1200 l.maci instruction test added. highlighting bug with immediate field for that instruction.

Various cycle accurate model updates. Now uses orpsoc-defines.v (processed C-compat. version) to build.
julius 4951d 06h /openrisc/trunk/
396 ORPSoCv2 final software fixes...for now. See updated README julius 4954d 05h /openrisc/trunk/
395 ORPSoCv2 moving ethernet tests to correct place julius 4954d 05h /openrisc/trunk/
394 ORPSoCv2 removing unused directories julius 4954d 05h /openrisc/trunk/
393 ORPSoCv2 software rearrangement in progress. Basic tests should now run again. julius 4954d 05h /openrisc/trunk/
392 ORPSoCv2 software path reorganisation stage 1. julius 4954d 21h /openrisc/trunk/
391 Removing modules no longer needed in ORPSoCv2 julius 4955d 22h /openrisc/trunk/
390 Updated toolchain build scripts to use FTP server on OpenCores.org. julius 4955d 22h /openrisc/trunk/
389 SD-Card boot added (sdboot) to the commands in the load file. DOS-filesystem added to support Fat12-16. Driver for SD-card added, SD and SDHC supported
Currently hardcoded to boot from vmlinux.bin
tac2 4966d 06h /openrisc/trunk/
387 Fixed testing, to always use our DEJAGNU config. jeremybennett 4979d 05h /openrisc/trunk/
386 Updated for release 0.5.0rc2 jeremybennett 4979d 06h /openrisc/trunk/
385 Updates for Or1ksim 0.5.0rc2.

* configure: Regenerated.
* configure.ac: Minor tidy ups. Version changed to 0.5.0rc2.
* debug/rsp-server.c (rsp_query): Simplified handling of
"qTStatus" to indicate we just do not support tracing.
* doc/or1ksim.texi <Configuring the Build>: No longer mandatory to
specify the target.
<Memory Configuration>: Warns about issues with memory controller.
<Memory Controller Configuration>: Warns about issues with memory
controller and advises not to use it.
<Standalone Simulator>: Details for options with arguments updated.
* NEWS: Updated for 0.5.0rc2.
* peripheral/mc.c (mc_poc): Use constant MC_POC_VALID
(mc_index): Ensure value is valid.
* peripheral/mc-defines.h <MC_CE_VALID>: Defined.

* testsuite/test-code-or1k/configure: Regenerated.
* testsuite/test-code-or1k/configure.ac: Handle the case where
target_cpu is not set. Version changed to 0.5.0rc2.
* testsuite/test-code-or1k/support/spr-defs.h <SPR_VR_RES>:
Definition corrected.
jeremybennett 4979d 06h /openrisc/trunk/
383 Adding makeinfo as a required tool to crossbuild-1.0.sh script julius 4980d 09h /openrisc/trunk/
382 New uClibc patch - to be built with 1.0 toolchain julius 4981d 04h /openrisc/trunk/
381 Crossbuild script for 1.0 updated to use new GCC rc2 patch and linux-2.6.35 julius 4981d 04h /openrisc/trunk/
380 Adding new Linux-2.6.35 patch, to be built with new 1.0 toolchain julius 4981d 04h /openrisc/trunk/
379 Linux-2.6.34 patch update - ethernet stability fix and USB host (ohs900) startup device detect improvement julius 4981d 05h /openrisc/trunk/
378 Adding gcc-4.5.1 patches to enable kernel to build again julius 4981d 08h /openrisc/trunk/
377 gcc-4.5.1/gcc/config/or32/or32.c:
Swap INTVAL for REGNO in or32_legitimate_address_p fixing 64-bit
machine build errors.
julius 4982d 00h /openrisc/trunk/

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